at85c51snd3 ATMEL Corporation, at85c51snd3 Datasheet - Page 207

• Manufacturer Part Number: at85c51snd3
• Description: At85c51snd3 Single-chip Digital Audio Decoder - Encoder With Usb 2.0 Interface
• Manufacturer: ATMEL Corporation

7632D–MP3–01/07
Reset Value = 1111 1110b
Table 229. MMCMD Register
MMCMD (1.B7h) – MMC Command Register
Reset Value = 1111 1111b
Table 230. MMDAT Register
MMDAT (1.B6h) – MMC Data Register
Reset Value = 1111 1111b
Number
Number
Number
MC7
MD7
7-0
7-0
Bit
Bit
Bit
6
5
4
3
2
1
0
7
7
Mnemonic Description
Mnemonic Description
Mnemonic Description
WFRM
EORM
EOCM
EOFM
HFRM
EOBM
MC7:0
MD7:0
MC6
MD6
Bit
Bit
Bit
6
6
-
End Of Response Interrupt Mask Bit
Set to prevent EORI flag from generating an interrupt.
Clear to allow EORI flag to generate an interrupt.
End Of Command Interrupt Mask Bit
Set to prevent EOCI flag from generating an interrupt.
Clear to allow EOCI flag to generate an interrupt.
End Of Frame Interrupt Mask Bit
Set to prevent EOFI flag from generating an interrupt.
Clear to allow EOFI flag to generate an interrupt.
Whole FIFO Ready Interrupt Mask Bit
Set to prevent WFRI flag from generating an interrupt.
Clear to allow WFRI flag to generate an interrupt.
Half FIFO Ready Full Interrupt Mask Bit
Set to prevent HFRI flag from generating an interrupt.
Clear to allow HFRI flag to generate an interrupt.
End Of Block Interrupt Mask Bit
Set to prevent EOBI flag from generating an interrupt.
Clear to allow EOBI flag to generate an interrupt.
Reserved
The value read from this bit is always 0. Do not set this bit.
MMC Command Receive Byte
Output (read) register of the response FIFO.
MMC Command Transmit Byte
Input (write) register of the command FIFO.
MMC Data Byte
Input (write) or output (read) register of the data FIFO.
MC5
MD5
5
5
MC4
MD4
4
4
MC3
MD3
3
3
MC2
MD2
2
2
MC1
MD1
1
1
MC0
MD0
0
0
207