at85c51snd3 ATMEL Corporation, at85c51snd3 Datasheet - Page 230

• Manufacturer Part Number: at85c51snd3
• Description: At85c51snd3 Single-chip Digital Audio Decoder - Encoder With Usb 2.0 Interface
• Manufacturer: ATMEL Corporation

Mode Fault in Slave Mode
230
AT85C51SND3B
Clearing the MODF bit is accomplished by reading SPSCR with MODF bit set, followed
by a write to SPCON. SPI controller may be re-enabled (SPEN = 1) after the MODF bit
is cleared.
Figure 123. Mode Fault Conditions in Master Mode (CPHA = 1 / CPOL = 0)
Note:
MODF error is detected when SS goes high during a transmission.
A transmission begins when SS goes low and ends once the incoming SCK goes back
to its idle level following the shift of the eighth data bit.
A MODF error occurs if a slave is selected (SS is low) and later unselected (SS is high)
even if no SCK is sent to that slave.
At any time, a ‘1’ on the SS pin of a slave SPI puts the MISO pin in a high impedance
state and internal state counter is cleared. Also, the slave SPI ignores all incoming SCK
clocks, even if it was already in the middle of a transmission. A new transmission will be
performed as soon as SS pin returns low.
Figure 124. Mode Fault Conditions in Slave Mode
Note:
–
the MSTR bit in SPCON is cleared
When SS is disabled (SSDIS set) it is not possible to detect a MODF error in master
mode because the SPI is internally unselected and the SS pin is a general purpose I/O.
MOSI (from master)
when SS is disabled (SSDIS set) it is not possible to detect a MODF error in slave mode
because the SPI is internally selected. Also the SS pin becomes a general purpose I/O.
MOSI (from master)
SCK Cycle Number
SCK Cycle Number
SCK (from master)
SCK (from master)
MISO (from slave)
MISO (from slave)
SS (master)
SPI enable
SS (slave)
SS (slave)
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
z
z
z
z
z
z
z
z
z
z
MODF detected
0
MODF detected
MSB
0
0
0
MSB
MSB
MSB
MSB
1
1
MODF detected
B6
MODF detected
B6
B6
B6
2
2
3
B5
3
B5
B4
4
7632D–MP3–01/07
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