cat93hc46 Catalyst Semiconductor, cat93hc46 Datasheet - Page 4

• Manufacturer Part Number: cat93hc46
• Description: 1-kb High Speed Microwire Serial Eeprom
• Manufacturer: Catalyst Semiconductor

The CAT93HC46 is a 1024-bit nonvolatile memory
intended for use with industry standard microprocessors.
The CAT93HC46 can be organized as registers of either
16 bits or 8 bits. When organized as X16, seven 9-bit
instructions control the reading, writing and erase
operations of the device. When organized as X8, seven
10-bit instructions control the operation of the device.
The CAT93HC46 operates on a single power supply and
will generate on chip the high voltage required during
write operation.
Instructions, addresses, and data are clocked into the DI
pin on the rising edge of the clock (SK). The DO pin is
normally in a high impedance state, except when reading
data from the device, or when checking the ready/busy
status after a write operation.
Doc. No. 1008, Rev. H
DO
SK
CS
DI
ERASE
WRITE
EWEN
EWDS
WRAL
READ
ERAL
t CSS
1
1
1
1
1
1
1
10
11
01
00
00
00
00
VALID
11XXXXX
00XXXXX
10XXXXX
01XXXXX
A6-A0
A6-A0
A6-A0
t DIS
t SKHI
A5-A0
A5-A0
A5-A0
11XXXX
00XXXX
10XXXX
01XXXX
t DIS
D7-D0
D7-D0
t SKLOW
4
The ready/busy status can be determined after the start
of a write operation by selecting the device (CS high) and
polling the DO pin; DO low indicates that the write
operation is not completed, while DO high indicates that
the device is ready for the next instruction. If necessary,
the DO pin may be placed back into a high impedance
state by shifting a dummy “1” into the DI pin. The DO pin
will enter the high impedance state on the falling edge of
the clock (SK). Placing the DO pin into the high impedance
state is recommended in applications where the DI pin
and the DO pin are to be tied together to form a common
DI/O pin.
The format for all instructions sent to the device is a
logical "1" start bit, a 2-bit (or 4-bit) opcode, 6-bit byte/
word address (an additional bit when organized X8) and
for write operations a 16-bit data field (8-bit for X8
organization).
VALID
D15-D0 Write Address AN–A0
D15-D0 Write All Addresses
Read Address AN–A0
Clear Address AN–A0
Write Enable
Write Disable
Clear All Addresses
t DIH
t PD0, t PD1
DATA VALID
t CSH
t CSMIN