psf21911 ETC-unknow, psf21911 Datasheet - Page 51

• Manufacturer Part Number: psf21911
• Description: Isdn Echocancellation Circuit Terminal Applications Iec-q
• Manufacturer: ETC-unknow

Table 7
2.5.2
An EOC-processor on the chip is responsible for the correct insertion and extraction of
EOC-data on the U-interface. The EOC-processor can be programmed to auto mode
(default) or transparent mode via bit EOCA in the UMOD register (table 20). Access to
the EOC is only possible when a superframe is transmitted. This is the case in the U-
transceiver states ’Synchronized’, ’Wait for ACT’, ’Transparent’, ’Error S/T’ and ’Pend.
Deac. U’. In all other states the EOC-bits on the U-interface are clamped to high.
Figure 20 EOC-Processor: Auto Mode, Transparent Mode
The EOC is controlled and monitored via MON-0 commands and messages in the IOM-2
Monitor channel. The structure of a MON-0-message is shown below. The structure is
identical in EOC auto and transparent mode.
Semiconductor Group
Address
a1 a2 a3
IOM-2
MON-0
EOC-Codes (cont’d)
EOC-Processor and MON-0
Pin AUTO = 1 or
Bit STCR:AUTO = 1
d/m
EOC
d/m
Auto mode
1
1
Excecute
EOC-
processor
Information
(hex)
i1 - i8
AA
XX
Echo
3x
Direction
EOC
EOC
NT ----> LT
NT ----> LT
U
51
IOM-2
MON-0
MON-0
Message
UTC
ACK
Pin AUTO = 0 or
Bit STCR:AUTO = 0
Transparent
Function
Unable to comply
Acknowledge
U-Transceiver
PSB 21911
PSF 21911
EOC
EOC
11.97
U