m24m01-hr STMicroelectronics, m24m01-hr Datasheet
m24m01-hr
Available stocks
Related parts for m24m01-hr
m24m01-hr Summary of contents
Page 1
... Features 2 ■ Compatible with I C extended addressing 2 ■ Two-wire I C serial interface: – M24M01-HR: 1 MHz clock, compatible with the Fast- 2 mode Plus I C protocol – M24M01-R, M24M01-W: 400 kHz clock, compatible with the Fast- 2 mode I C protocol ■ Single supply voltage: – ...
Page 2
... ECC (error correction code) and Write cycling . . . . . . . . . . . . . . . . . . . . . 16 3.10 Minimizing system delays by polling on ACK . . . . . . . . . . . . . . . . . . . . . . 18 3.11 Read operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.12 Random Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.13 Current Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.14 Sequential Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.15 Acknowledge in Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4 Initial delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2/ Operating supply voltage Power-up conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Device reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Power-down conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 M24M01-R, M24M01-W, M24M01-HR ...
Page 3
... M24M01-R, M24M01-W, M24M01-HR 5 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 8 M24M01-R die description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 9 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Contents 3/36 ...
Page 4
... DC characteristics (M24M01-W Table 13. AC characteristics at 400 kHz (M24M01-R and M24M01- Table 14. AC characteristics at 1 MHz (M24M01-HR Table 15. SO8N – 8-lead plastic small outline, 150 mils body width, package data Table 16. SO8W – 8-lead plastic small outline, 208 mils body width, package mechanical data ...
Page 5
... Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 2. SO connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 3. Device select code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 4. M24M01-R/M24M01-W – Maximum R capacitance (C bus Figure 5. M24M01-HR – Maximum for bus at maximum frequency f bus 2 Figure bus protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 7. Write mode sequences with (data write inhibited Figure 8 ...
Page 6
... When data is read by the bus master, the bus master acknowledges the receipt of the data byte in the same way. The M24M01-R, M24M01-HR and M24M01-W are delivered in SO8 packages and the M24M01-R is also available in wafer form (see ...
Page 7
... M24M01-R, M24M01-W, M24M01-HR Table 1. Signal names Signal name E1, E2 SDA SCL Figure 2. SO connections 1. See Section 7: Package mechanical data Not connected internally. Function Chip Enable Serial Data Serial Clock Write Control Supply voltage Ground M24M01-R M24M01-R M24M01- ...
Page 8
... Write operations are allowed. When Write Control (WC) is driven high, device select and address bytes are acknowledged, Data bytes are not acknowledged. 8/36 M24M01-R, M24M01-W, M24M01-HR indicates how the value of the pull-up resistor can be calculated). In Figure 3. When not connected (left floating), these inputs ...
Page 9
... M24M01-R, M24M01-W, M24M01-HR 2.5 V ground the reference for the V SS 2.6 Supply voltage (V 2.6.1 Operating supply voltage V Prior to selecting the memory and issuing instructions to it, a valid and stable V within the specified [V secure a stable DC supply voltage recommended to decouple the V suitable capacitor (usually of the order 100 nF) close to the V pins ...
Page 10
... Signal description Figure 4. M24M01-R/M24M01-W – Maximum R capacitance (C 100 Figure 5. M24M01-HR – Maximum R (C bus 100 Bus line capacitor (pF) 10/ for bus at maximum frequency f bus 100 1000 Bus line capacitor (pF) value versus bus parasitic capacitance bus 2 ) for bus at maximum frequency f ...
Page 11
... M24M01-R, M24M01-W, M24M01-HR 2 Figure bus protocol SCL SDA SCL SDA START Condition SCL SDA Table 2. Device select code Device select code 1. The most significant bit, b7, is sent first and E2 are compared against the respective external pins on the memory device. ...
Page 12
... The device that controls the data transfer is known as the bus master, and the other as the slave device. A data transfer can only be initiated by the bus master, which will also provide the serial clock for synchronization. The M24M01-R, M24M01-HR and M24M01-W devices are always slaves in all communications. ...
Page 13
... M24M01-R, M24M01-W, M24M01-HR 3.5 Memory addressing To start communication between the bus master and the slave device, the bus master must initiate a Start condition. Following this, the bus master sends the device select code, shown in Table 2 (on Serial Data (SDA), most significant bit first). ...
Page 14
... Device operation Figure 7. Write mode sequences with (data write inhibited) WC Byte Write WC Page Write WC (cont'd) Page Write (cont'd) 14/36 M24M01-R, M24M01-W, M24M01-HR ACK ACK Dev sel Byte addr Byte addr R/W ACK ACK Dev sel Byte addr Byte addr R/W NO ACK NO ACK Data in N ...
Page 15
... M24M01-R, M24M01-W, M24M01-HR 3.6 Write operations Following a Start condition the bus master sends a device select code with the R/W bit (RW) reset to 0. The device acknowledges this, as shown in bytes. The device responds to each address byte with an acknowledge bit, and then waits for the data byte. ...
Page 16
... It is therefore recommended to write by packets of 4 bytes in order to benefit from the larger amount of Write cycles. The M24M01-R, M24M01-HR and M24M01-W devices are qualified at 1 million (1 000 000) Write cycles, using a cycling routine that writes to the device by multiples of 4-byte words. ...
Page 17
... M24M01-R, M24M01-W, M24M01-HR Figure 9. Write cycle polling flowchart using ACK First byte of instruction with already decoded by the device Write cycle in progress Start condition Device select with ACK NO returned YES Next Operation is NO YES addressing the memory ReStart Stop Data for the ...
Page 18
... Byte addr R/W ACK ACK Dev sel Data out 1 R/W ACK ACK Dev sel * Byte addr Byte addr R/W ACK NO ACK Data out N M24M01-R, M24M01-W, M24M01-HR ACK ACK NO ACK Dev sel * Data out R/W ACK NO ACK Data out N ACK ACK Dev sel * Data out1 R ...
Page 19
... M24M01-R, M24M01-W, M24M01-HR 3.11 Read operations Read operations are performed independently of the state of the Write Control (WC) signal. After the successful completion of a Read operation, the device’s internal address counter is incremented by one, to point to the next byte address. 3.12 Random Address Read A dummy Write is first performed to load the address into this address counter (as shown in Figure 10) but without sending a Stop condition ...
Page 20
... Compliant with JEDEC Std J-STD-020D (for small body, Sn- assembly), the ST ECOPACK® 7191395 specification, and the European directive on Restrictions on Hazardous Substances (RoHS) 2002/95/EU. 2. AEC-Q100-002 (compliant with JEDEC Std JESD22-A114A, C1=100pF, R1=1500Ω, R2=500Ω) 20/36 M24M01-R, M24M01-W, M24M01-HR Table 6 may cause permanent damage to Parameter (2) Min ...
Page 21
... Designers should check that the operating conditions in their circuit match the measurement conditions when relying on the quoted parameters. Table 7. Operating conditions (M24M01-R and M24M01-HR) Symbol V Supply voltage ...
Page 22
... DC and AC parameters Table 11. DC characteristics (M24M01-R and M24M01-HR) Symbol Parameter Input leakage current I LI (E1, E2, SCL, SDA) I Output leakage current LO I Supply current (Read Supply current (Write) CC0 I Standby supply current CC1 Input low voltage V IL (SCL, SDA, WC) Input high voltage ...
Page 23
... M24M01-R, M24M01-W, M24M01-HR Table 12. DC characteristics (M24M01-W) Symbol Parameter Input leakage current I LI (E1, E2, SCL, SDA) I Output leakage current LO I Supply current (Read Supply current (Write) CC0 I Standby supply current CC1 Input low voltage V IL (SCL, SDA, WC) Input high voltage ...
Page 24
... Start condition hold time Stop condition setup time Time between Stop condition and next Start condition Write time Pulse width ignored (input filter on SCL and SDA specification (which specifies t SU:DAT Figure M24M01-R, M24M01-W, M24M01-HR and Table 8 Min. Max. 400 600 1300 1000 300 20 ...
Page 25
... M24M01-R, M24M01-W, M24M01-HR Table 14. AC characteristics at 1 MHz (M24M01-HR) Symbol Alt SCL t t CHCL HIGH t t CLCH LOW ( XH1XH2 R ( XL1XL2 F (2)( QL1QL2 DXCH SU:DAT t t CLDX HD:DAT t t CLQX DH (4)( CLQV AA ( CHDL SU:STA t t DLCL ...
Page 26
... SCL SDA In tCHDH Stop condition SCL tCLQV SDA Out 26/36 tCHCL tCLCH tCLDX tDXCH SDA Change SDA Input tW Write cycle tCHCL tCLQX Data valid Data valid M24M01-R, M24M01-W, M24M01-HR tXL1XL2 tCHDH tDHDL Stop Start condition condition tCHDL Start condition tQL1QL2 AI00795e ...
Page 27
... M24M01-R, M24M01-W, M24M01-HR 7 Package mechanical data In order to meet environmental requirements, ST offers the M24M01-R, M24M01-HR and M24M01-W in ECOPACK interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK trademark. ECOPACK specifications are available at www.st.com. Figure 13. SO8N – ...
Page 28
... Values in inches are converted from mm and rounded to 4 decimal digits. 28/ millimeters Typ Min Max 2.5 0 0.25 1.51 2 0.4 0.35 0.51 0.2 0.1 0.35 0.1 6.05 5.02 6.22 7.62 8.89 1. 0° 10° 0.5 0.8 8 M24M01-R, M24M01-W, M24M01- 6L_ME (1) inches Typ Min 0 0.0594 0.0157 0.0138 0.0079 0.0039 0.1976 0.3 0.05 - 0° 0.0197 8 Max 0.0984 0.0098 0.0787 0.0201 0.0138 0.0039 0.2382 0.2449 0.35 - 10° 0.0315 ...
Page 29
... M24M01-R, M24M01-W, M24M01-HR 8 M24M01-R die description Caution: As EEPROM cells loose their charge (and so their binary value) when exposed to ultra violet (UV) light, EEPROM dice delivered in wafer form by STMicroelectronics must never be exposed to UV light. Product ● Wafer size ● Die identification Die Layout ● ...
Page 30
... CC WC SCL SDA Pad locations are measured relative to the die center (where X and Y are the horizontal and vertical axis, respectively, measured in µm). Refer to 30/36 M24M01-R, M24M01-W, M24M01-HR (1) X (µm) Y (µm) 784.02 1683 922 1383.1 922.78 –1171.22 922.78 –1450.14 –920.06 – ...
Page 31
... M24M01-R, M24M01-W, M24M01-HR 9 Part numbering Table 18. Ordering information scheme (M24M01-x products sold in packages) Example: Device type 2 M24 = I C serial access EEPROM Device function M01 = 1 Mbit (256 Kb × 8 bits) Clock frequency Blank: f max = 400 kHz max = 1 MHz C Operating voltage 2 5.5 V ...
Page 32
... A = F8L Delivery form W = unsawn wafer Wafer thickness 21 = 280 µm Temperature range /90 = – °C For a list of available options (speed, package, etc.) or for further information on any aspect of the devices, please contact your nearest ST sales office. 32/36 M24M01-R, M24M01-W, M24M01-HR M24M01 – /90 ...
Page 33
... M24M01-R, M24M01-W, M24M01-HR Table 20. Available M24M01-x products (package, voltage range, frequency, temperature grade) Package SO8N (MN) SO8W (MW) Wafer M24M01-R M24M01- MHz 1 5 400 kHz Range Part numbering M24M01 400 kHz Range 6 Range 3 Range 6 - Range 6 - 33/36 ...
Page 34
... Section 7: Package mechanical 1 MHz maximum clock frequency added: – Figure 5: M24M01-HR – Maximum Rbus value versus bus parasitic capacitance (Cbus) for an I2C bus at maximum frequency fC = 1MHz – Table 14: AC characteristics at 1 MHz (M24M01-HR) ...
Page 35
... M24M01-R, M24M01-W, M24M01-HR Table 21. Document revision history (continued) Date 02-Sep-2008 Revision Added: M24M01-W part number in device grade 3 temperature range (see Table 8: Operating conditions characteristics (M24M01-W) scheme (M24M01-x products sold in M24M01-R offered as a bare die (see description and Table 19: Ordering information scheme (M24M01-R sold as bare dice)) ...
Page 36
... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 36/36 Please Read Carefully: © 2008 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com M24M01-R, M24M01-W, M24M01-HR ...