M24M01-DFMN6TP STMicroelectronics, M24M01-DFMN6TP Datasheet
M24M01-DFMN6TP
Specifications of M24M01-DFMN6TP
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M24M01-DFMN6TP Summary of contents
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... Memory array: – 1 Mbit (128 Kbytes) of EEPROM – Page size: 256 bytes – Additional Write lockable page (M24M01-D order codes) ■ Single supply voltage and high speed: – 1 MHz clock from 1 5.5 V ■ Write: – Byte Write within 5 ms – ...
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... Power-up conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Device reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Power-down conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Byte Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Page Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Write Identification Page (M24M01-D only Lock Identification Page (M24M01-D only ECC (Error Correction Code) and Write cycling . . . . . . . . . . . . . . . . . . 18 Minimizing Write delays by polling on ACK . . . . . . . . . . . . . . . . . . . . . . 19 Random Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Doc ID 12943 Rev 10 M24M01-R M24M01-DF ...
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... M24M01-R M24M01-DF 5.2.2 5.2.3 5.3 Read Identification Page (M24M01-D only 5.4 Read the lock status (M24M01-D only Initial delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 9 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 10 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Current Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Sequential Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Doc ID 12943 Rev 10 ...
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... AC measurement conditions Table 9. Input parameters Table 10. Cycling performance by groups of four bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 11. Memory cell data retention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 12. DC characteristics (M24M01-R, device grade Table 13. DC characteristics (M24M01-F, device grade Table 14. 400 kHz AC characteristics Table 15. 1 MHz AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 16. TSSOP8 – 8-lead thin shrink small outline, package mechanical data Table 17. SO8N – ...
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... Figure 14. AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 15. TSSOP8 – 8-lead thin shrink small outline, package outline . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 16. SO8N – 8 lead plastic small outline, 150 mils body width, package outline . . . . . . . . . . . . 33 Figure 17. M24M01 DFCS6TP/K, WLCSP 8-bump wafer-level chip scale package outline . . . . . . . . 34 bus = 400 kHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 C bus = 1MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 C ...
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... Description The M24M01 Memory) organized as 128 K × 8 bits. The M24M01-R can operate with a supply voltage from 1 5.5 V, and the M24M01-DF can operate with a supply voltage from 1 5.5 V, over an ambient temperature range of –40 °C / +85 °C. The M24M01-D offers an additional page, named the Identification Page (256 bytes). The Identification Page can be used to store sensitive application parameters which can be (later) permanently locked in Read-only mode ...
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... DU: Don't Use (if connected, must be connected See Section 9: Package mechanical data Figure 3. WLCSP connections for M24M01 DFCS6TP/K (top view, marking side, with balls on the underside) 3. DU: Don't Use (if connected, must be connected See Section 9: Package mechanical data ...
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... the reference for the V SS 8/38 (Figure 12 indicates how to calculate the value of Figure 4. When not connected (left floating), these inputs M24xxx M24xxx Ai12806 supply voltage. CC Doc ID 12943 Rev 10 M24M01-R M24M01- establish the CC SS ...
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... M24M01-R M24M01-DF 2.6 Supply voltage (V 2.6.1 Operating supply voltage V Prior to selecting the memory and issuing instructions to it, a valid and stable V within the specified [V in Section 8: DC and AC recommended to decouple the 100 nF) close to the V This voltage must remain stable and valid until the end of the transmission of the instruction and, for a write instruction, until the completion of the internal write cycle (t 2 ...
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... Memory organization 3 Memory organization The memory is organized as shown below. Figure 5. Block diagram 10/38 Doc ID 12943 Rev 10 M24M01-R M24M01-DF ...
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... M24M01-R M24M01-DF 4 Device operation The device supports the I data on to the bus is defined transmitter, and any device that reads the data receiver. The device that controls the data transfer is known as the bus master, and the other as the slave device. A data transfer can only be initiated by the bus master, which will also provide the serial clock for synchronization ...
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... The acknowledge bit is used to indicate a successful byte transfer. The bus transmitter, whether it be bus master or slave device, releases Serial Data (SDA) after sending eight bits of data. During the 9 acknowledge the receipt of the eight data bits. 12/38 th clock pulse period, the receiver pulls Serial Data (SDA) low to Doc ID 12943 Rev 10 M24M01-R M24M01-DF ...
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... M24M01-R M24M01-DF 4.5 Device addressing To start communication between the bus master and the slave device, the bus master must initiate a Start condition. Following this, the bus master sends the device select code, shown in Table 2 (on Serial Data (SDA), most significant bit first). ...
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... If the Write Control input (WC) is driven High, the Write instruction is not executed and the accompanying data bytes are not acknowledged, as shown in 14/38 Figure A13 A12 A11 Table 2). Doc ID 12943 Rev 10 M24M01-R M24M01-DF 7, and waits for two address A10 the W Figure 8. ...
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... M24M01-R M24M01-DF 5.1.1 Byte Write After the device select code and the address bytes, the bus master sends one data byte. If the addressed location is Write-protected, by Write Control (WC) being driven high, the device replies with NoAck, and the location is not modified. If, instead, the addressed location is not Write-protected, the device replies with Ack ...
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... Page Write WC (cont'd) Page Write (cont'd) 16/38 ACK ACK Dev sel Byte addr Byte addr R/W ACK ACK Dev sel Byte addr Byte addr R/W NO ACK NO ACK Data in N Doc ID 12943 Rev 10 M24M01-R M24M01-DF ACK NO ACK Data in ACK NO ACK Data in 1 Data in 2 AI01120d ...
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... If the Identification page is locked, the data bytes transferred during the Write Identification Page instruction are not acknowledged (NoAck). 5.1.4 Lock Identification Page (M24M01-D only) The Lock Identification Page instruction (Lock ID) permanently locks the Identification page in Read-only mode. The Lock ID instruction is similar to Byte Write (into memory array) with the following specific conditions: ● ...
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... A group of four bytes is located at addresses [4*N, 4*N+1, 4*N+2, 4*N+3], where integer. 18/38 ( consequence, the maximum cycling budget is Table 10: Cycling performance by groups of four Doc ID 12943 Rev 10 M24M01-R M24M01-DF (a) . Inside a group bytes. ...
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... M24M01-R M24M01-DF 5.1.6 Minimizing Write delays by polling on ACK The maximum Write time (t parameters, but the typical time is shorter. To make use of this, a polling sequence can be used by the bus master. The sequence, as shown in ● Initial condition: a Write cycle is in progress. ● Step 1: the bus master issues a Start condition followed by a device select code (the first byte of the new instruction). ● ...
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... ACK ACK Dev sel Data out 1 R/W ACK ACK Dev sel * Byte addr Byte addr R/W ACK NO ACK Data out N Doc ID 12943 Rev 10 M24M01-R M24M01-DF ACK ACK NO ACK Dev sel * Data out R/W ACK NO ACK Data out N ACK ACK ACK Dev sel * Data out1 ...
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... Read Identification Page (M24M01-D only) The Identification Page (256 bytes additional page which can be written and (later) permanently locked in Read-only mode. The Identification Page can be read by issuing an Read Identification Page instruction. This instruction uses the same protocol and format as the Random Address Read (from memory array) with device type identifier defined as 1011b ...
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... Initial delivery state 5.4 Read the lock status (M24M01-D only) The locked/unlocked status of the Identification page can be checked by transmitting a specific truncated command [Identification Page Write instruction + one data byte] to the device. The device returns an acknowledge bit if the Identification page is unlocked, otherwise a NoAck bit if the Identification page is locked. ...
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... M24M01-R M24M01-DF 7 Maximum rating Stressing the device outside the ratings listed in the device. These are stress ratings only, and operation of the device at these, or any other conditions outside those indicated in the operating sections of this specification, is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability ...
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... Input capacitance (other pins Input impedance (WC Sampled only, not 100% tested. 24/38 Parameter Parameter Parameter (1) Parameter Test condition V < 0 > 0 Doc ID 12943 Rev 10 M24M01-R M24M01-DF Min. Max. Unit 1.8 5.5 –40 85 ° MHz Min. Max. Unit 1.7 5.5 –40 85 ° MHz Min ...
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... M24M01-R M24M01-DF Table 10. Cycling performance by groups of four bytes Symbol Parameter Write cycle Ncycle endurance 1. Cycling performance for products identified by process letter K. 2. The Write cycle endurance is defined for groups of four data bytes located at addresses [4*N, 4*N+1, 4*N+2, 4*N+3] where integer. The Write cycle endurance is defined by characterization and qualification ...
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... DC and AC parameters . Table 12. DC characteristics (M24M01-R, device grade 6) Symbol Parameter Input leakage current I LI (E1, E2, SCL, SDA) I Output leakage current LO I Supply current (Read Supply current (Write) CC0 I Standby supply current CC1 Input low voltage V IL (SCL, SDA, WC) Input high voltage ...
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... M24M01-R M24M01-DF Table 13. DC characteristics (M24M01-F, device grade 6) Symbol Parameter Input leakage current I LI (E1, E2, SCL, SDA) I Output leakage current LO I Supply current (Read Supply current (Write) CC0 I Standby supply current CC1 Input low voltage V IL (SCL, SDA, WC) Input high voltage ...
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... WC hold time (after the Stop condition) Internal Write cycle duration Pulse width ignored (input filter on SCL and SDA) - single glitch 2 C specification recommendations. × C time constant is within the values specified in bus bus Doc ID 12943 Rev 10 M24M01-R M24M01-DF Min. Max. Unit - 400 kHz 600 - ns 1300 ...
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... M24M01-R M24M01-DF Table 15. 1 MHz AC characteristics Symbol Alt SCL t t CHCL HIGH t t CLCH LOW t t XH1XH2 XL1XL2 F ( QL1QL2 DXCX SU:DAT t t CLDX HD:DAT ( CLQX DH ( CLQV CHDL SU:STA t t DLCL HD:STA t t CHDH ...
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... DC and AC parameters Figure 12. Maximum Figure 13. Maximum 30/38 value versus bus parasitic capacitance (C bus C bus at maximum frequency f value versus bus parasitic capacitance C bus C bus at maximum frequency f Doc ID 12943 Rev 10 M24M01-R M24M01-DF ) for bus = 400 kHz C ) for bus = 1MHz C ...
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... M24M01-R M24M01-DF Figure 14. AC waveforms Doc ID 12943 Rev 10 DC and AC parameters 31/38 ...
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... Doc ID 12943 Rev 10 M24M01-R M24M01-DF (1) inches Typ. Min. Max. 0.0472 0.0020 0.0059 0.0394 0.0315 0.0413 0.0075 0.0118 0.0035 0.0079 0.0039 0.1181 0.1142 0.1220 ...
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... M24M01-R M24M01-DF Figure 16. SO8N – 8 lead plastic small outline, 150 mils body width, package outline Drawing is not to scale. Table 17. SO8N – 8 lead plastic small outline, 150 mils body width, package data Symbol ccc ...
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... Package mechanical data Figure 17. M24M01 DFCS6TP/K, WLCSP 8-bump wafer-level chip scale package outline 1. Drawing is not to scale. 34/38 Doc ID 12943 Rev 10 M24M01-R M24M01-DF ...
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... M24M01-R M24M01-DF Table 18. M24M01-DFCS6TP/K, WLCSP 8-bump wafer-level chip scale package mechanical data Symbol (number of terminals) aaa bbb ccc ddd eee 1. Values in inches are converted from mm and rounded to four decimal digits. millimeters Typ Min Max 0.540 ...
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... Manufacturing technology code 1. RoHS-compliant and halogen-free (ECOPACK2 2. The process letters apply to WLCSP devices only. The process letters appear on the device package (marking) and on the shipment box. Please contact your nearest ST Sales Office for further information. 36/38 M24M01 - D (1) ® ) Doc ID 12943 Rev 10 ...
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... Modified description of Write Control in Replaced C with C L bus Changed note 4 about t 400 kHz (M24M01-R and Datasheet split into: – M24M01-R, M24M01-DF (this datasheet) for standard products 9 (range 6), – M24M01-125 datasheet for automotive products (range 3). Updated: – Section 5.2.2: Current Address Read – ...
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... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 38/38 Please Read Carefully: © 2012 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com Doc ID 12943 Rev 10 M24M01-R M24M01-DF ...