lh28f400su-nc Sharp Microelectronics of the Americas, lh28f400su-nc Datasheet
lh28f400su-nc
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lh28f400su-nc Summary of contents
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... LH28F400SU-NC FEATURES • User-Configurable x8 or x16 Operation • Write/Erase Operation ( – No Requirement for DC/DC Converter to Write/Erase • Maximum Access Time (V = 5.0 V ± 0. • 80ns Maximum Access Time (V = 5.0 V ± 0 • 32 Independently Lockable Blocks (16K) • 100,000 Erase Cycles per Block • ...
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... LH28F400SU-NC 48-PIN TSOP RY/ Figure 2. 48-Pin TSOP Configuration 2 4M (512K × 8, 256K × 16) Flash Memory ...
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... Flash Memory OUTPUT BUFFER OUTPUT MULTIPLEXER INPUT -1,0 17 BUFFER Y-DECODER ADDRESS X-DECODER QUEUE LATCHES ADDRESS COUNTER Figure 4. LH28F400SU-NC Block Diagram OUTPUT INPUT BUFFER BUFFER DATA ID QUEUE REGISTER REGISTERS CSR REGISTER ESRs DATA COMPARATOR Y GATING/SENSING . . . . . . ...
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... LH28F400SU-NC PIN DESCRIPTION SYMBOL TYPE BYTE-SELECT ADDRESSES: Selects between high and low byte when device INPUT x8 mode. This address is latched in x8 Data Writes. Not used in x16 mode (i.e., the WORD-SELECT ADDRESSES: Select a word within one 16K block. These INPUT ...
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... Device Drivers, PCMCIA card information, ROM-Executable OS or Ap- plication Code. Each block has an associated non-vola- tile lock-bit which determines the lock status of the block. In addition, the LH28F400SU-NC has a software con trolled master Write Protect circuit which prevents any ...
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... This feature allows the user to OR- » » tie many pins together in a multiple memory con- figuration such as a Resident Flash Array. The LH28F400SU-NC is specified for a maximum access time operation (4.75 to ACC 5.25 V), and operation (4.5 to 5.5 V) ACC over the commercial temperature range (0 to +70° ...
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... BY , which is either tied to V through a resistor. When the provide device ID codes. Device ID code= 21H (x8 PPH until all operations are complete. OL LH28F400SU- » » NOTE ...
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... Resume command (D0H) after completed next Erase command. Beside, when the Erase Suspend command is issued, while the device is not in Erase, be sure to issue Resume command (D0H) after the next erase complete. LH28F400SU-NC Performance Enhancement Command Bus Definitions FIRST BUS CYCLE COMMAND MODE OPER ...
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... Program 0 for the bit in which you want to change data from • Program 1 for the bit which has already been pro- grammed 0. For example, changing Byte data from 10111101 to 10111100 requires 11111110 programming. LH28F400SU- level. The WSM interrogates ...
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... LH28F400SU-NC START WRITE 40H or 10H WRITE DATA/ADDRESS READ COMPATIBLE STATUS REGISTER 0 CSR CSR FULL STATUS CHECK IF DESIRED OPERATION COMPLETE CSR FULL STATUS CHECK PROCEDURE READ CSRD (see above) 0 DATA WRITE CSR. SUCCESSFUL LOW PP CSR.3 = DETECT 0 CLEAR CSRD RETRY/ERROR RECOVERY Figure 6. Word/Byte Writes with Compatible Status Register 10 4M (512K × ...
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... If CSR.3 (VPPS) is set to '0', after clearing CSR.3/4/5, 1. Retry Single Block Erase command. If power is off low during erase operation, 1. Clear CSR.3/4/5 and issue Reset WP command, 2. Retry Single Block Erase command. 3. Set WP command is issued, if necessary. LH28F400SU-NC COMMENTS D = 20H D0H CSRD Toggle update CSRD ...
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... LH28F400SU-NC START WRITE B0H READ COMPATIBLE STATUS REGISTER 0 CSR CSR.6 = ERASE COMPLETED 1 WRITE FFH READ ARRAY DATA DONE NO READING? YES WRITE D0H WRITE FFH ERASE RESUMED READ ARRAY DATA Figure 8. Erase Suspend to Read Array with Compatible Status Register 12 4M (512K × 8, 256K × 16) Flash Memory ...
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... If CSR. set command sequence error, should be cleared before further attempts are initiated. Write FFH after the last operation to reset device to read array mode. See Command Bus Definitions for description of codes. Figure 9. Block Locking Scheme LH28F400SU-NC COMMENTS Q = CSRD Toggle update CSRD WSM Ready ...
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... LH28F400SU-NC START RESET WP (NOTE 1) ERASE BLOCK (NOTE 2) SET WP (NOTE 3) WRITE NEW DATA TO BLOCK (NOTE 4) RELOCK BLOCK (NOTE 5) OPERATION COMPLETE FLOW TO REWRITE DATA NOTES: 1. Use Reset-Write-Protect flowchart. Enable Write/Erase operation to all blocks. 2. Use Block-Erase flowchart. Erasing a block clears any previously established lockout for that block. ...
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... CSR Full Status Check can be done after each 2-Byte Write, or after a sequence of 2-Byte Writes. Write FFH after the last operation to reset device to read array mode. See Command Bus Cycle notes for description of codes. LH28F400SU-NC is automatically -1 28F400SUT-NC60-9 15 ...
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... LH28F400SU-NC START (NOTE) WRITE A7H WRITE D0H READ COMPATIBLE STATUS REGISTER NO 0 SUSPEND CSR.7 = ERASE 1 CSR FULL STATUS CHECK IF DESIRED OPERATION COMPLETE CSR FULL STATUS CHECK PROCEDURE READ CSRD (see above) 0 ERASE CSR. SUCCESSFUL LOW PP CSR.3 = DETECT 0 CLEAR CSRD RETRY/ERROR ...
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... Protect command must be written to reflect the actual lock-bit status. Write FFH after the last operation to reset device to Read Array Mode. See Command Bus Cycle notes for description of codes. Figure 13. Set Write Protect LH28F400SU-NC COMMENTS Check CSR WSM Ready 0 = WSM Busy D = 57H ...
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... LH28F400SU-NC START READ COMPATIBLE STATUS REGISTER 0 CSR WRITE 47H WRITE CONFIRM DATA/ADDRESS READ COMPATIBLE STATUS REGISTER 0 CSR (NOTE) 1 CSR. OPERATION COMPLETE 18 4M (512K × 8, 256K × 16) Flash Memory BUS COMMAND OPERATION Read Write Reset Write Protect Write Reset Confirm Read ...
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... V which, during transitions, may overshoot TYP. MAX. UNITS 100 pF ± 10% 2 LH28F400SU-NC TEST CONDITIONS NOTE °C Ambient Temperature 2.0 V for periods < 20 ns. CC TEST CONDITIONS NOTE T = 25° 1.0 MHz 25° ...
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... LH28F400SU-NC Timing Nomenclature For 5.0 V systems use the standard JEDEC cross point definitions. Each timing parameter consists of 5 characters. Some common examples are defined below time (t) from CE » (E) going low (L) to the outputs (Q) becoming valid (V) CE ELQV t t time (t) from OE ...
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... BYTE = V Inputs = MHz Word/Byte Write in Progress Block Erase in Progress Block Erase Suspended ±1 ±10 µ 0.2 5 µA RP LH28F400SU-NC TEST CONDITIONS NOTE = V MAX GND MAX GND MAX., CC » » ±0 ± ...
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... LH28F400SU-NC DC Characteristics (Continued 5.0 V ± 0 0°C to +70° SYMBOL PARAMETER I V Read Current PPR Write Current PPW Erase Current PPE PP V Erase Suspend PP I PPES Current V Input Low Voltage IL V Input High Voltage IH V Output Low Voltage ...
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... V ± 0. MIN. MAX 400 » » Low 15 after the falling edge of CE » without impact on t LH28F400SU-NC = 5.0 V ± 0.5 V UNITS NOTE MIN. MAX 430 ...
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... LH28F400SU- POWER-UP STANDBY V IH ADDRESSES ( ( ( ( HIGH-Z OH DATA (D/ 5 GND ( (512K × 8, 256K × 16) Flash Memory DEVICE AND ADDRESS SELECTION OUTPUTS ENABLED ADDRESSES STABLE t AVAV ...
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... OL V HIGH-Z OH DATA ( ADDRESSES STABLE t AVAV t FLEL t AVGL t AVQV t GLQV t ELQV t GLQX t ELQX DATA OUTPUT t AVQV t FLQZ DATA OUTPUT Figure 20. BY » » Timing Waveforms LH28F400SU- EHQZ . . . t GHQZ . . . HIGH-Z DATA . . . OUTPUT HIGH-Z 28F400SUT-NC60-18 25 ...
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... LH28F400SU-NC POWER-UP AND RESET TIMINGS V POWER ( ADDRESS (A) DATA (Q) Figure 21. V SYMBOL PARAMETER » Low 4.5 V MIN. PL5V CC t Address Valid to Data Valid for V AVQV » High to Data Valid for V PHQV NOTES: CE » ...
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... Command Write operations. LH28F400SU-NC 1 UNITS NOTE MAX 100 µs ns µs µ ...
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... LH28F400SU-NC WRITE DATA-WRITE OR ERASE DEEP POWER-DOWN SETUP COMMAND V ADDRESSES (A) IH (NOTE AVAV V ADDRESSES (A) IH (NOTE AVAV ( WHEH t ELWL ( ( WLWH V HIGH-Z IH DATA (D/ PHWL V OH RY/BY ( (P) ...
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... MIN. MAX. 60 400 100 100 0 » Going Low 4.5 0.3 » for all Command Write operations. LH28F400SU- 5.0 V ± 0 UNITS NOTE MIN. MAX 430 ns 3 100 ...
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... LH28F400SU-NC WRITE DATA-WRITE DEEP OR ERASE POWER-DOWN SETUP COMMAND V ADDRESSES (A) IH (NOTE AVAV V ADDRESSES (A) IH (NOTE AVAV ( EHWH t WLEL ( ( ELEH V HIGH-Z IH DATA (D/ PHEL V OH RY/BY ( (P) ...
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... Word Write mode is valid at x16-bit configuration only. 5. Depends on the number of protected blocks. (1) TYP. MIN. MAX. UNITS 13 µs 20 µs 20 µs 0.22 1.0 s 0.17 1.0 s 0.17 1 8.8 - 14.4 s LH28F400SU-NC TEST CONDITIONS NOTE Byte Write Mode 2 Two-Byte Serial Write Mode 2, 3 Word Write Mode ...
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... LH28F400SU-NC 56TSOP (TSOP056-P-1420 20.30 [0.799] 19.70 [0.776] 18.60 [0.732] 18.20 [0.717] 0.18 [0.007] 0.08 [0.003] 19.30 [0.760] 18.70 [0.736] MAXIMUM LIMIT DIMENSIONS IN MM [INCHES] MINIMUM LIMIT 32 4M (512K × 8, 256K × 16) Flash Memory 56 0.50 [0.020] TYP. 0.28 [0.011] 0.12 [0.005] 29 0.13 [0.005] 0.49 [0.019] 0.39 [0.015] 0.22 [0.009] 0.02 [0.001] 1.10 [0.043] 0.90 [0.035] 1.19 [0.047] MAX. PACKAGE BASE PLANE ...
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... Flash Memory 48TSOP (TSOP048-P-1218) 0.50 [0.020] 0.30 [0.012] TYP. 0.10 [0.004 12.20 [0.480] 11.80 [0.465] MAXIMUM LIMIT DIMENSIONS IN MM [INCHES] MINIMUM LIMIT 25 16.60 [0.654] 18.40 [0.724] 16.20 [0.638] 17.60 [0.693] 24 0.15 [0.006] 1.10 [0.043] 0.425 [0.017] 0.90 [0.035] 1.20 [0.047] MAX. 0.20 [0.008] 0.425 [0.017] 0.00 [0.000] LH28F400SU-NC 17.00 [0.669] 0.20 [0.008] 0.10 [0.004] 48TSOP 33 ...
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... LH28F400SU-NC 44SOP (SOP044-P-0600) 1.27 [0.050] TYP. 0.50 [0.020] 0.30 [0.012 28.40 [1.118] 28.00 [1.102] MAXIMUM LIMIT DIMENSIONS IN MM [INCHES] MINIMUM LIMIT ORDERING INFORMATION LH28F400SU X -NC## Device Type Package Speed Example: LH28F400SUT-NC60 (4M (512K x 8, 256K x 16) Flash Memory, 60 ns, 56-pin TSOP (512K × 8, 256K × 16) Flash Memory 23 13 ...
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... LH28F400SU-NC LIFE SUPPORT POLICY SHARP components should not be used in medical devices with life support functions or in safety equipment (or similiar applications where component failure would result in loss of life or physical harm) without the written approval of an officer of the SHARP Corporation. WARRANTY SHARP warrants to Customer that the Products will be free from defects in material and workmanship under normal use and service for a period of one year from the date of invoice ...