lm5046sqx National Semiconductor Corporation, lm5046sqx Datasheet
lm5046sqx
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lm5046sqx Summary of contents
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... Packages ■ eTSSOP-28 ■ LLP-28 (5mm x 5mm) Simplified Phase-Shifted Full-Bridge Power Converter © 2011 National Semiconductor Corporation LM5046 Features ■ Highest Integration Controller for Small Form Factor, High Density Power Converters ■ High Voltage Start-up Regulator ■ ...
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Connection Diagrams www.national.com Top View 30147802 TSSOP28 2 ...
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... Ordering Information Order Number Package Type LM5046MH eTSSOP-28 LM5046MHX eTSSOP-28 LM5046SQ LLP-28 LM5046SQX LLP-28 Top View LLP-28 Package NSC Package Drawing MXA28A MXA28A SQA28A SQA28A 3 30147803 Supplied As Rail of 48 Units Tape and Reel of 2500 Units Available Soon Available Soon www.national.com ...
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Pin Descriptions TSSOP LLP Pin Name Pin 1 25 UVLO Line Under-Voltage Lockout 2 26 OVP/OTP Over Voltage Protection 3 27 RAMP Input to PWM Comparator Current Sense Input 5 1 SLOPE Slope Compensation Current 6 2 ...
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TSSOP LLP Pin Name Pin Soft-Start Input 14 10 SSSR Secondary Side Soft-Start 15 11 SSOFF Soft-Stop Disable 19 15 SR2 Synchronous Rectifier Driver 21 17 VCC Output of Start-Up Regulator 22 18 PGND Power Ground 23, ...
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Absolute Maximum Ratings VIN to GND HS to GND (Note 4) BST1/BST2 to GND BST1/BST2 to HS1/HS2 HO1/HO2 to HS1/HS2 (Note 2) LO1/LO2/SR1/SR2 (Note GND CC REF,SSOFF,RT,OVP,UVLO to GND RAMP COMP Electrical Characteristics junction temperature range of ...
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Symbol Parameter I SSSR charge current SSSR I SSSR discharge current 1 SSSR-DIS1 I SSSR discharge current 2 SSSR-DIS2 SSSR output low voltage SSSR threshold to enable SR1/SR2 Current Sense Input (CS Pin) V Current limit threshold CS CS delay ...
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Symbol Parameter Comp Pin V COMP current to RAMP offset PWM- RAMP offset SS-OS COMP current to RAMP gain SS to RAMP gain COMP current for SSSR charge current enable COMP to output delay Minimum duty cycle ...
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Typical Performance Characteristics Application Board Efficiency 100 90 80 36V 48V 70 72V 60 V OUT = 3. LOAD CURRENT (A) V and V vs. V VCC REF V vs. I REF REF 25 30 ...
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Dead-Time vs. Temperature Threshold vs. Temperature www.national.com Dead-Time T 30147865 30147813 vs 30147866 ...
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Block Diagram FIGURE 1. 11 30147804 www.national.com ...
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Functional Description The LM5046 PWM controller contains all of the features nec- essary to implement a Phase-Shifted Full-Bridge (PSFB) topology power converter using either current mode or volt- age mode control. This device is intended to operate on the primary ...
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For example, if the desired oscillator frequency is 400 kHz i.e. each phase (LO1 or LO2) at 200 kHz, the value of R 25kΩ. If the LM5046 synchronized to an external clock, that signal must be coupled ...
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PWM Comparator The LM5046 pulse width modulator (PWM) comparator is a three input device, it compares the signal at the RAMP pin to the loop error signal or the soft-start, whichever is lower, to control the duty cycle. This comparator ...
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Soft-Start The soft-start circuit allows the power converter to gradually reach a steady state operating point, thereby reducing the start-up stresses and current surges. When bias is supplied to the LM5046, the SS capacitor is discharged by an internal MOSFET. ...
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FIGURE 4. Timing Diagram Illustrating the Sequence of Gate-Driver Outputs in the PSFB Topology www.national.com 16 30147821 ...
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Synchronous Rectifier Control Outputs (SR1 & SR2) Synchronous rectification (SR) of the transformer secondary provides higher efficiency, especially for low output voltage converters, compared to the diode rectification. The reduction of rectifier forward voltage drop (0.5V - 1.5V) to 10mV ...
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FIGURE 5. Synchronous Rectifier Timing Diagram 18 30147836 ...
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Soft-Start of the Synchronous Rectifiers In addition to the basic soft-start already described, the LM5046 contains a second soft-start function that gradually turns on the synchronous rectifiers to their steady-state duty cycle. This function keeps the synchronous rectifiers off dur- ...
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Soft-Stop Off The Soft-Start Off (SSOFF) pin gives additional flexibility by allowing the power converter to be configured for hard-stop during line UVLO and hiccup mode condition. If the SS OFF FIGURE 8. Stop-Stop Waveforms during a UVLO Event www.national.com ...
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Table 1: Soft-Stop in Fault Conditions Fault Condition UVLO (UVLO<1.25V) 3x the charging rate OVP (OVP>1.25V) Hiccup (CS>0.75 and RES>1V) 6x the charging rate VCC/VREF UV Internal Thermal Limit Note: All the above conditions are valid with SSOFF pin tied ...
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Applications Information PHASE-SHIFTED FULL-BRIDGE OPERATION The phase shifted full-bridge topology is a derivative of the conventional full-bridge topology. When tuned appropriately the PSFB topology achieves zero voltage switching (ZVS) of the primary FETs while maintaining constant switching fre- quency. The ...
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When tuned appropriately either by deliberately increasing the leakage inductance or by adding an extra commutating inductor, the sinusoidal resonant waveform peaks such that it is clamped by ...
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VOLTAGE MODE CONTROL USING THE LM5046 To configure the LM5046 for voltage mode control, an exter- nal resistor (R ) and capacitor ( ND, and the RAMP pins is required to create a saw-tooth modulation ramp signal shown ...
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VIN and VCC The voltage applied to the VIN pin, which may be the same as the system voltage applied to the power transformer’s pri- mary (V ), can vary in the range of the 14 to 100V ...
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UVLO AND OVP VOLTAGE DIVIDER SELECTION Two dedicated comparators connected to the UVLO and OVP pins are used to detect under voltage and over voltage con- ditions. The threshold values of both these comparators are set at 1.25V. The two ...
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The UVLO and OVP can also be set together using a 3 re- sistor divider ladder as shown in Figure as explained in the basic UVLO divider selection. Using the same values the above two examples, for the ...
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CURRENT SENSE The CS pin receives an input signal representative of its transformer’s primary current, either from a current sense transformer or from a resistor located at the junction of source pin of the primary switches, as shown in 21, ...
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HICCUP MODE CURRENT LIMIT RESTART The operation of the hiccup mode restart circuit is explained in the Functional Description section. During a continuous current limit condition, the RES pin is charged with 30µA cur- rent source. The restart delay time ...
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FIGURE 22. Hiccup Mode Delay and Soft-Start Timing Diagram Printed Circuit Board Layout The LM5046 current sense and PWM comparators are very fast and respond to short duration noise pulses. The compo- nents at the CS, COMP, SLOPE, RAMP, SS, ...
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Evaluation Board Schematic 31 www.national.com ...
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Physical Dimensions www.national.com inches (millimeters) unless otherwise noted Molded TSSOP-28 NS Package Number MXA28A 28-Lead LLP Package NS Package Number SQA28A 32 ...
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Notes 33 www.national.com ...
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