lm5088mhx-2 National Semiconductor Corporation, lm5088mhx-2 Datasheet - Page 18

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lm5088mhx-2

Manufacturer Part Number
lm5088mhx-2
Description
Wide Input Range Non-synchronous Buck Controller
Manufacturer
National Semiconductor Corporation
Datasheet

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OUTPUT VOLTAGE DIVIDER
R
resistors can be calculated from:
1.62 kΩ was chosen for R
R
value of R
(1.2V/ R
UVLO DIVIDER
A voltage divider can be connected to the EN pin to the set
the minimum startup voltage (VIN
feature is required, set the value of R
100 kΩ and then calculate R
In this design, for a VIN
54.9 kΩ resulting in a R
ed to install a capacitor parallel to R
pin is left open, the LM5088 will begin operation once the up-
per VCC UV threshold of 4.0V (typ) is reached.
RESTART CAPACITOR (LM5008-2 only)
The basic operation of the hiccup mode current limit is de-
scribed in the functional description. In the LM5088-2 appli-
cation example the RES pin is configured for delayed hiccup
mode. Please refer to the functional description to configure
this pin in alternate configurations and also refer figure 8 for
the timing diagram. The delay time to initiate a hiccup cycle
(t1) is programmed by the selection of RES pin capacitor. In
the case of continuous cycle-by-cycle current limit detection
at the CS pin, the time required for C
given by
The cool down time (t2) is set by the time taken to discharge
the RES cap with 1.2 µA current source. This feature will re-
duce the input power drawn by the converter during a pro-
longed over current condition. In this application 500 µs of
delay time was selected. The minimum value of C
itor should be no less than 0.022 µF.
MOSFET SELECTION
Selection of the Buck MOSFET is governed by the same
tradeoffs as the switching frequency. Losses in power MOS-
FETs can be broken down into conduction losses and switch-
ing losses. The conduction loss is given by:
Where, D is the duty cycle and IO is the maximum load cur-
rent. The factor 1.3 accounts for the increase in MOSFET on-
resistance due to heating. Alternatively, for a more precise
calculation, the factor of 1.3 can be ignored and the on-resis-
tance of the MOSFET can be estimated using the R
Temperature curves in the MOSFET datasheet.
The switching loss occurs during the brief transition period as
the MOSFET turns on and off. During the transition period
FB1
FB2
and R
value of 5.11 kΩ. A reasonable guide is to select the
FB1
FB1
) is in between 1 mA and 100 µA.
FB2
value such that the current through the resistor
set the output voltage level, the ratio of these
P
DC
= D x (I
UV1
(min)
FB1
value of 16.2 kΩ. it is recommend-
O
2
UV1
of 5V, R
in this design which results in a
x R
from:
DS(ON)
(min)
UV1
RES
UV2
) of the regulator. If this
UV2
x 1.3)
for filtering. If the EN
between 10 kΩ and
to reach the 1.2V is
was selected to be
RES
DS(ON)
capac-
vs.
18
both current and voltage are present in the MOSFET. The
switching loss can be approximated as:
Where, t
The rise and fall times are usually mentioned in the MOSFET
datasheet or can be empirically observed on the scope. An-
other loss, which is associated with the buck MOSFET is the
“gate-charging loss”. This loss differs from the above two
losses in the sense that it is dissipated in the LM5088 and not
in the MOSFET itself. Gate charging loss, P
the current driving charging the gate capacitance of the power
MOSFETs and is approximated as:
For this example with the maximum input voltage of 55V, the
Vds breakdown rating of the selected MOSFET must be
greater than 55V plus any ringing across drain to source due
to parasitics. In order to minimize switching time and gate
drive losses, the selected MOSFET must also have low gate
charge (Q
ample is the SI7148DP which has a total gate charge of 30nC
and rise and fall times of 10 ns and 12 ns respectively.
DIODE SELECTION
A Schottky type re-circulating diode is required for all LM5088
applications. The near ideal reverse recovery current tran-
sients and low forward voltage drop are particularly important
diode characteristics for high input voltage and low output
voltage applications common to LM5088. The diode switching
loss is minimized in a Schottky diode because of near ideal
reverse recovery. The conduction loss can be approximated
by:
Where, V
to assume a short circuit load condition. In this case, the diode
will carry the output current almost continuously. The reverse
breakdown rating should be selected for the maximum input
voltage level plus some additional safety margin to withstand
ringing at the SW node. For this application a 60V On Semi-
conductor Schottky diode (MBRB2060) with a specified for-
ward drop of 0.6V at 7A at a junction temperature of 50°C was
selected. For output loads of 5A and greater and high input
voltage applications, a diode in a D
mended to support the worst case power dissipation
SNUBBER COMPONENTS SELECTION
Excessive ringing and spikes can cause erratic operation and
couple spikes and noise to the output. Voltage spikes beyond
the rating of the LM5088 or the re-circulating diode can dam-
age these devices. A snubber network across the power
diode reduces ringing and spikes at the switching node. Se-
lecting the values for the snubber is best accomplished
through empirical methods. First, make sure that the lead
lengths for the snubber connections are very short. For the
current levels typical for the LM5088, a resistor value between
3 and 10Ω should be adequate. As a rule of thumb, a snubber
capacitor which is 4~5 times the Schottky diode’s junction ca-
pacitance will reduce spikes adequately. Increasing the value
of the snubber capacitor will result in more damping but also
results in higher losses. The resistor’s power dissipation is
independent of the resistance value as the resistor dissipates
the energy stored by the snubber capacitor. The resistor’s
power dissipation can be approximated as:
R
F
g
and t
is the forward drop of the diode. The worst case is
). A good choice of MOSFET for this design ex-
P
P
SW
R_SNUB
F
P
= 0.5 x V
are the rise and fall times of the MOSFET.
dc_diode
P
GC
= C
= VCC x Q
= (1 - D) x I
SNUB
IN
x I
O
x VIN
x (t
g
2
R
x f
PAK package is recom-
max
O
+ t
SW
x V
2
F
) x f
x f
F
SW
GC
SW
, results from

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