lm5088mhx-2 National Semiconductor Corporation, lm5088mhx-2 Datasheet - Page 3

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lm5088mhx-2

Manufacturer Part Number
lm5088mhx-2
Description
Wide Input Range Non-synchronous Buck Controller
Manufacturer
National Semiconductor Corporation
Datasheet

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0
Pin(S)
10
10
11
12
13
14
15
16
5
6
7
8
9
RT/SYNC
COMP
BOOT
Name
DITH
GND
OUT
CSG
VCC
RES
SW
HG
FB
CS
Input for bootstrap capacitor An external capacitor is required between the BOOT and the SW pins to provide
Internal oscillator frequency
Output of the bias regulator VCC tracks VIN up to the regulation level (7.8V Typ). A 0.1 µF to 10 µF ceramic
Output of the internal error
Output voltage connection Connect directly to the regulated output voltage.
Feedback signal from the
Current Sense Ground
synchronization input
Hiccup Mode Restart
Frequency Dithering
( LM5088-1 Only)
( LM5088-2 Only)
regulated output
Switching node
Current sense
set input and
Description
High Gate
amplifier
Ground
Application Information
The internal oscillator is programmed with a single resistor between this pin
and the GND pin. The recommended frequency range is 50 kHz to 1 MHz. An
external synchronization signal, which is higher in frequency than the
programmed frequency, can be applied to this pin through a small coupling
capacitor. The RT resistor to ground is required even when using external
synchronization.
Ground return.
The loop compensation network should be connected between this pin and the
FB pin.
This pin is connected to the inverting input of the internal error amplifier. The
regulation threshold is 1.205V.
A capacitor connected between DITH pin and GND is charged and discharged
by 27 µA current sources. As the voltage on the DITH pin ramps up and down,
the oscillator frequency is modulated between -5% to +5% of the nominal
frequency set by the RT resistor. Grounding the DITH pin will disable the
frequency dithering mode.
The RES pin is normally connected to an external capacitor that sets the timing
for hiccup mode current limiting. In normal operation, a 25µA current source
discharges the RES pin capacitor to ground. If cycle-by-cycle current limit
threshold is exceeded during any PWM cycle, the current sink is disabled and
RES capacitor is charged by an internal 50 µA current. If the RES voltage
reaches 1.2V, the HG pin gate drive signal will be disabled and the RES pin
capacitor will be discharged by a 1 µA current sink. Normal operation will
resume when the RES pin falls below 0.2V.
Low side reference for the current sense resistor.
Current measurement connection for the re-circulating diode. An external
sense resistor and an internal sample/hold circuit sense the diode current at
the conclusion of the buck switch off-time. This current measurement provides
the DC offset level for the emulated current ramp.
Connect to the source terminal of the external MOSFET switch.
Connect to the gate terminal of the external MOSFET switch.
bias to the MOSFET gate driver. The capacitor is charged from VCC via an
internal diode during the off-time of the buck switch.
decoupling capacitor is required. An external voltage between 8.3V and 13V
can be applied to this pin to reduce internal power dissipation.
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