dspic33fj128gp204 Microchip Technology Inc., dspic33fj128gp204 Datasheet - Page 117

• Manufacturer Part Number: dspic33fj128gp204
• Description: High-performance, 16-bit Digital Signal Controllers
• Manufacturer: Microchip Technology Inc.

REGISTER 7-23:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-12
bit 11
bit 10-8
bit 7
bit 6-4
bit 3
bit 2-0
Note 1: Interrupts disabled on devices without ECAN™ modules.
U-0
U-0
—
—
Unimplemented: Read as ‘0’
C1IP<2:0>: ECAN1 Event Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
C1RXIP<2:0>: ECAN1 Receive Data Ready Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
SPI2IP<2:0>: SPI2 Event Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
SPI2EIP<2:0>: SPI2 Error Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
R/W-1
R/W-1
IPC8: INTERRUPT PRIORITY CONTROL REGISTER 8
C1IP<2:0>
SPI2IP<2:0>
‘1’ = Bit is set
W = Writable bit
R/W-0
R/W-0
(1)
R/W-0
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(1)
U-0
U-0
—
—
R/W-1
R/W-1
(1)
C1RXIP<2:0>
SPI2EIP<2:0>
x = Bit is unknown
R/W-0
R/W-0
DS70292C-page 115
(1)
R/W-0
R/W-0
bit 8
bit 0