cop87l84rg National Semiconductor Corporation, cop87l84rg Datasheet
cop87l84rg
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cop87l84rg Summary of contents
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... COP87L84RG 8-Bit One-Time Programmable (OTP) Microcontroller with 32 Kbytes of Program Memory General Description The COP87L84RG is a member of the COP8 controller family It is pin and software compatible to the mask ROM COP888EG product family Key Features Full duplex UART Y Three 16-bit timers each with two 16-bit registers ...
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... The devices operates over a volt- age range High throughput is achieved with an efficient regular instruction set operating at a maximum rate per instruction Note -X Crystal Oscillator -E Halt Enable Order Number COP87L84RGM-XE or COP87L84RGN-XE http www national com TABLE I COP888CG EG Family Members ROM EPROM TM Device ...
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Connection Diagrams (Continued) Port Type WDOUT ...
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Absolute Maximum Ratings If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage ( Voltage at Any Pin b Total Current into V Pin (Source ...
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AC Electrical Characteristics Parameter Instruction Cycle Time ( Crystal Resonator R C Oscillator Inputs t SETUP t HOLD Output Propagation Delay t t PD1 PD0 SO SK All Others MICROWIRE TM Setup Time (t ) UWS MICROWIRE Hold ...
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Pin Descriptions V and GND are the power supply pins CC CKI is the clock input This can come from generat- ed oscillator or a crystal oscillator (in conjunction with CKO) See Oscillator Description section RESET is ...
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Pin Descriptions (Continued) Since input only pin and G7 is the dedicated CKO clock output pin (crystal clock option) or general purpose input (R C clock option) the associated bits in the data and configuration registers for ...
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Functional Description (Continued) The data memory consists of 256 bytes of RAM Sixteen bytes of RAM are mapped as ‘‘registers’’ at addresses 0F0 to 0FF Hex These registers can be loaded immediately and also decremented and tested with the DRSZ ...
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Reset (Continued) Ports being initialized to the TRI-STATE mode Pin G1 of the G Port is an exception (as noted below) since pin G1 is dedicated as the WATCHDOG and or Clock Monitor error output pin Port D is set ...
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Control Registers (Continued) PSW Register (Address X 00EF) The PSW register contains the following select bits GIE Global interrupt enable (enables interrupts) EXEN Enable external interrupt BUSY MICROWIRE PLUS busy shifting flag EXPND External interrupt pending T1ENA Timer T1 Interrupt ...
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Timers (Continued) TIMER T1 TIMER T2 AND TIMER T3 The devices have a set of three powerful timer counter blocks T1 T2 and T3 The associated features and func- tioning of a timer block are described by referring to the ...
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Timers (Continued) The timer value gets copied over into the register when a trigger event occurs on its corresponding pin Control bits TxC3 TxC2 and TxC1 allow the trigger events to be speci- fied either as a positive or a ...
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Timers (Continued) The timer mode control bits (TxC3 TxC2 and TxC1) are detailed below TxC3 TxC2 TxC1 ...
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Power Save Modes (Continued) The WATCHDOG detector circuit is inhibited during the HALT mode However the clock monitor circuit if enabled remains active during HALT mode in order to ensure a clock monitor error if the device inadvertently enters the ...
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Multi-Input Wake Up (Continued 8-bit read write register which contains a control bit for every L port bit Setting a particular WKEN bit enables a Wake Up from the associated L port pin The user can select whether ...
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UART The device contains a full-duplex software programmable UART The UART (Figure 12) consists of a transmit shift register a receiver shift register and seven addressable reg- isters as follows a transmit buffer register (TBUF) a receiv- er buffer register ...
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UART (Continued) UART CONTROL AND STATUS REGISTERS The operation of the UART is programmed through three registers ENU ENUR and ENUI The function of the individ- ual bits in these registers is as follows ENU-UART Control and Status Register (Address ...
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UART (Continued) ETDX TDX (UART Transmit Pin) is the alternate function assigned to Port L pin selected by setting ETDX bit To simulate line break generation software should reset ETDX bit and output logic zero to TDX ...
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UART Operation (Continued) UART INTERRUPTS The UART is capable of generating interrupts Interrupts are generated on Receive Buffer Full and Transmit Buffer Emp- ty Both interrupts have individual interrupt vectors Two bytes of program memory space are reserved for each ...
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Baud Clock Generation FIGURE 15 UART BAUD Clock Divisor Registers TABLE III Prescaler Factors Prescaler Prescaler Prescaler Select Factor Select 00000 NO CLOCK 10000 00001 1 10001 00010 1 5 10010 00011 2 10011 00100 2 5 10100 00101 3 ...
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Baud Clock Generation (Continued) Where BR is the Baud Rate Fc is the CKI frequency N is the Baud Rate Divisor (Table IV the Prescaler Divide Factor selected by the value in the Prescaler Select Register (Table III) ...
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Comparators (Continued) CMPSL REGISTER (ADDRESS X’00B7) The CMPSL register contains the following bits CMP1EN Enable comparator CMP1RD Comparator result (this is a read only bit which will read the comparator is not enabled) CMP10E Selects pin I3 ...
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Interrupts (Continued) At this time since GIE 0 other maskable interrupts are e disabled The user is now free to do whatever context switching is required by saving the context of the machine in the stack with PUSH instructions The ...
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Interrupts (Continued) When an ST occurs the user can re-initialize the stack pointer and do a recovery procedure (similar to reset but not necessarily containing all of the same initialization pro- cedures) before restarting The occurrence ...
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WATCHDOG Operation (Continued) The WATCHDOG service window will restart when the WDOUT pin goes high It is recommended that the user tie the WDOUT pin back to V through a resistor in order to CC pull WDOUT high A WATCHDOG ...
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Detection of Illegal Conditions The device can detect various illegal conditions resulting from coding errors transient noise power supply voltage drops runaway programs etc Reading of undefined ROM gets zeros The opcode for soft- ware interrupt is zero If the ...
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MICROWIRE PLUS (Continued) MICROWIRE PLUS OPERATION Setting the BUSY bit in the PSW register causes the MICROWIRE PLUS to start shifting the data It gets reset when eight data bits have been shifted The user may reset the BUSY bit ...
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Memory Map All RAM ports and registers (except A and PC) are mapped into data memory address space Address Contents S ADD REG 0000 to 006F On-Chip RAM bytes (112 bytes) 0070 to 007F Unused RAM Address Space (Reads As ...
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Addressing Modes There are ten addressing modes six for operand address- ing and four for transfer of control OPERAND ADDRESSING MODES Register Indirect This is the ‘‘normal’’ addressing mode The operand is the data memory addressed by the B pointer ...
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Instruction Set (Continued) INSTRUCTION SET ADD A Meml ADD ADC A Meml ADD with Carry SUBC A Meml Subtract with Carry AND A Meml Logical AND ANDSZ A Imm Logical AND Immed Skip if Zero OR A Meml Logical OR ...
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Instruction Execution Time Most instructions are single byte (with immediate addressing mode instructions taking two bytes) Most single byte instructions take one cycle time to execute Skipped instructions require x number of cycles to be skipped where x equals the ...
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LOWER NIBBLE 32 ...
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Development Support SUMMARY iceMASTER IM-COP8 400 Full feature in-circuit em- TM ulation for all COP8 products A full set of COP8 Basic and Feature Family device and package specific probes are available COP8 Debug Module Moderate cost in-circuit emulation and ...
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Development Support (Continued) iceMASTER DEBUG MODULE (DM) The iceMASTER Debug Module based combination in-circuit emulation tool and COP8 based OTP EPROM pro- gramming tool developed and marketed by MetaLink Corpo- ration to support the whole COP8 family ...
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Development Support (Continued) iceMASTER EVALUATION PROGRAMMING UNIT (EPU) The iceMASTER EPU-COP888GG based in-circuit simulation tool to support the feature family COP8 products See Figure 21 for configuration The simulation capability is a very low cost means of ...
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Development Support (Continued) COP8 ASSEMBLER LINKER SOFTWARE DEVELOPMENT TOOL KIT National Semiconductor offers a relocateable COP8 macro cross assembler linker librarian and utility software devel- opment tool kit Features are summarized as follows Basic and Feature Family instruction set by ...
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Development Support (Continued) AVAILABLE LITERATURE For more information please see the COP8 Basic Family User’s Manual Literature Number 620895 COP8 Feature Family User’s Manual Literature Number 620897 and Na- tional’s Family of 8-bit Microcontrollers COP8 Selection Guide Literature Number 630009 ...
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http www national com 38 ...
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... Physical Dimensions inches (millimeters) unless otherwise noted Molded SO Wide Body Package (M) Order Number COP87L84RGM-XE NS Package Number M28B 39 http www national com ...
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... National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications Molded Dual-In-Line Package (N) Order Number COP87L84RGN-XE NS Package Number N28B 2 A critical component is any component of a life ...