lf4415 LOGIC Devices Inc., lf4415 Datasheet

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lf4415

Manufacturer Part Number

lf4415

Description

Video Memory / Fifo

Manufacturer

LOGIC Devices Inc.

Datasheet

1.LF4415.pdf (32 pages)

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Download datasheet (3Mb)

LOGIC Devices Incorporated

Features

Applications

Selectable Memory Organization

LF4460 - 60Mbit

Frame buffer for common HD formats (720p, 1080i, 1080p)

HDTV / SDTV Frame Synchronization

HDTV Display Buffer

Time Base Correction (TBC)

Freeze-Frame Buffer

Picture-in-Picture (PIP) Buffer

Frame Rate Conversion

Security Camera Systems

Field-Based or Frame-Based Comb Filtering

HD Video Capture & Editing Systems

Deep Data Buffering

Image Manipulation (Rotation, Zoom)

Test Pattern Generation

Motion Detection or Frame-to-Frame Correlation

Memory densities: 15, 30, 60Mbit

150MHz Max clock rate

Independent Read and Write ports:

• Supports simultaneous read/write operations

• Enables buffering across clock domains

Operating Modes:

• Single-channel FIFO w/ Asynchronous I/O

• Dual independent FIFOs w/ Asynchronous I/O

Flexible Write/Read Pointer Manipulation

• W/R address pointer Clear/Set

• W/R address pointers can be overridden in real-

• TRS detection for auto-clearing of Write pointer

• W/R memory access Enable/Disable

• Input enable control (Write Masking) for freeze

time using external 24bit address port

frame control

• 7,761,600 x 8-bit

• 6,209,280 x 10-bit

• 5,174,400 x 12-bit

• 3,880,800 x 16-bit

• 3,104,640 x 20-bit

• 2,587,200 x 24-bit

www.logicdevices.com

Selectable Memory Organization

LF4430 - 30Mbit

• 3,880,800 x 8-bit

• 3,104,640 x 10-bit

• 2,587,200 x 12-bit

• 1,940,400 x 16-bit

• 1,552,320 x 20-bit

• 1,293,600 x 24-bit

1

Selectable I/O V

Selectable Core V

172 ball FBGA package (15 x 15 x 1.4mm)

Depth expansion is supported for Multi-frame

HDTV, Multiframe SDTV, and other formats:

• Seamless address space is maintained with up

to 12 cascaded devices

Near-Full/Empty Flags With Programmable

Thresholds

Collide Flag alerts User of W/R pointer crossings

I

Output Enable Control (Data Skipping)

JTAG Boundary Scan - IEEE 1149.1

2

C Serial Microprocessor Interface

PRELIMINARY

High Performance Memory Product

DD

Selectable Memory Organization

LF4415 - 15Mbit

DD

= 1.8V, 2.5V, 3.3V

• 1,940,400 x 8-bit

• 1,552,320 x 10-bit

• 1,293,600 x 12-bit

•

•

•

= 1.8V, 2.5V, 3.3V

970,200 x 16-bit

776,160 x 20-bit

646,800 x 24-bit

Video Memory / FIFO

January 23, 2008 LDS-44xx-A

FRAME

MEMORY

LF4460

LF4430

LF4415

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