km416c4000c Samsung Semiconductor, Inc., km416c4000c Datasheet - Page 9

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km416c4000c

Manufacturer Part Number
km416c4000c
Description
4m X 16bit Cmos Dynamic Ram With Fast Page Mode
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
KM416C4000C, KM416C4100C
13.
14.
15.
16.
17.
18.
19.
20.
21.
22.
t
t
t
t
t
t
t
If
For RAS-only refresh and burst CAS-before-RAS refresh mode, 4096(4K/8K) cycles of burst refresh must be executed within
64ms before and after self refresh, in order to meet refresh specification.
For distributed CAS-before-RAS with 15.6us interval CAS-before-RAS refresh should be executed with in 15.6us immediately
before and after self refresh in order to meet refresh specification.
ASC
CP
CWD
CWL
CSR
CHR
DS
t
RASS
DQ0 ~ DQ15
is specified from the later CAS rising edge in the previous cycle to the earlier CAS falling edge in the next cycle.
is specified for the earlier CAS falling edge and
,
is referenced to the earlier CAS falling edge before RAS transition low.
is referenced to the later CAS rising edge after RAS transition low.
is specified from W falling edge to the earlier CAS rising edge.
t
is referenced to the later CAS falling edge at word read-modify-write cycle.
CAH
100us, then RAS precharge time must use
UCAS
UCAS
LCAS
LCAS
are referenced to the earlier CAS falling edge.
RAS
t
DS
Din
t
CSR
t
DH
t
t
DH
RPS
is specified by the later CAS falling edge.
instead of
t
CHR
t
RP
.
CMOS DRAM

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