xr16m680 Exar Corporation, xr16m680 Datasheet - Page 4

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xr16m680

Manufacturer Part Number
xr16m680
Description
1.62v To 3.63v High Performance Uart With 32-byte Fifo
Manufacturer
Exar Corporation
Datasheet

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XR16M680
1.62V TO 3.63V HIGH PERFORMANCE UART WITH 32-BYTE FIFO
PIN DESCRIPTIONS
Pin Description
DATA BUS INTERFACE
MODEM OR SERIAL I/O INTERFACE
(R/W#)
(IRQ#)
N
IOW#
IOR#
CS#
INT
D7
D6
D5
D4
D3
D2
D1
D0
TX
A2
A1
A0
AME
32-QFN
P
17
18
19
32
31
30
29
14
12
20
IN
5
4
3
1
8
7
#
48-TQFP
PIN#
26
27
28
47
46
45
44
43
19
16
30
11
4
3
2
8
25-BGA
P
A5
A4
B4
C3
C2
E3
E1
D1
E2
D2
C1
B5
C5
D4
A3
D3
IN
#
T
(OD)
I/O
YPE
O
O
I
I
I
I
Address lines [2:0]. These 3 address lines select the internal regis-
ters in UART channel during a data bus transaction.
Data bus lines [7:0] (bidirectional).
When 16/68# pin is at logic 1, the Intel bus interface is selected and
this input becomes read strobe (active low). The falling edge insti-
gates an internal read cycle and retrieves the data byte from an
internal register pointed by the address lines [A2:A0], puts the data
byte on the data bus to allow the host processor to read it on the ris-
ing edge.
When 16/68# pin is at logic 0, the Motorola bus interface is selected
and this input should be connected to VCC.
When 16/68# pin is at logic 1, it selects Intel bus interface and this
input becomes write strobe (active low). The falling edge instigates
the internal write cycle and the rising edge transfers the data byte
on the data bus to an internal register pointed by the address lines.
When 16/68# pin is at logic 0, the Motorola bus interface is selected
and this input becomes read (logic 1) and write (logic 0) signal.
This input is chip select (active low) to enable the device.
When 16/68# pin is at logic 1 for Intel bus interface, this output
become the active high device interrupt output. The output state is
defined by the user through the software setting of MCR[3]. INT is
set to the active mode when MCR[3] is set to a logic 1. INT is set to
the three state mode when MCR[3] is set to a logic 0. See MCR[3].
When 16/68# pin is at logic 0 for Motorola bus interface, this output
becomes the active low device interrupt output (open drain). An
external pull-up resistor is required for proper operation.
UART Transmit Data or infrared encoder data. Standard transmit
and receive interface is enabled when MCR[6] = 0. In this mode,
the TX signal will be a logic 1 during reset or idle (no data). Infrared
IrDA transmit and receive interface is enabled when MCR[6] = 1. In
the Infrared mode, the inactive state (no data) for the Infrared
encoder/decoder interface is a logic 0. If it is not used, leave it
unconnected.
4
D
ESCRIPTION
REV. 1.0.0

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