xr16v2750 Exar Corporation, xr16v2750 Datasheet - Page 34

• Manufacturer Part Number: xr16v2750
• Description: High Performance Duart With 64-byte Fifo
• Manufacturer: Exar Corporation

XR16V2750
HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
MSR[6]: RI Input Status
Normally this bit is the complement of the RI# input. In the loopback mode this bit is equivalent to bit-2 in the
MCR register. The RI# input may be used as a general purpose input when the modem interface is not used.
MSR[7]: CD Input Status
Normally this bit is the complement of the CD# input. In the loopback mode this bit is equivalent to bit-3 in the
MCR register. The CD# input may be used as a general purpose input when the modem interface is not used.
This is a 8-bit general purpose register for the user to store temporary data. The content of this register is
preserved during sleep mode but becomes 0xFF (default) after a reset or a power off-on cycle.
This register replaces SPR (during a Write) and is accessible only when FCTR[6] = 1.
EMSR[1:0]: Receive/Transmit FIFO Level Count (Write-Only)
When Scratchpad Swap (FCTR[6]) is asserted, EMSR bits 1-0 controls what mode the FIFO Level Counter is
operating in.
During Alternate RX/TX FIFO Level Counter Mode, the first value read after EMSR bits 1-0 have been
asserted will always be the RX FIFO Level Counter. The second value read will correspond with the TX FIFO
Level Counter. The next value will be the RX FIFO Level Counter again, then the TX FIFO Level Counter and
so on and so forth.
EMSR[2]: Reserved
EMSR[3]: Automatic RS485 Half-Duplex Control Output Inversion
•
•
EMSR[5:4]: Extended RTS Hysteresis
4.10
4.11
Logic 0 = RTS# output is LOW during TX and HIGH during RX (default, compatible with 16C2850).
Logic 1 = RTS# output is HIGH during TX and LOW during RX.
Scratch Pad Register (SPR) - Read/Write
Enhanced Mode Select Register (EMSR)
FCTR[6] EMSR[1] EMSR[0] Scratchpad is
0
1
1
1
EMSR
B
IT
0
0
0
0
0
0
0
0
X
X
0
1
-5
T
ABLE
T
ABLE
EMSR
B
12: S
IT
0
0
0
0
1
1
1
1
X
0
1
1
-4
13: A
CRATCHPAD
Scratchpad
RX FIFO Level Counter Mode
TX FIFO Level Counter Mode
Alternate RX/TX FIFO Counter Mode
FCTR
B
UTO
IT
0
0
1
1
0
0
1
1
-1
34
RTS H
S
FCTR
B
WAP
IT
0
1
0
1
0
1
0
1
YSTERESIS
-0
S
ELECTION
(C
H
HARACTERS
YSTERESIS
RTS#
±16
±24
±32
±4
±6
±8
±8
0
)
REV. 1.0.3