xr16l2751im Exar Corporation, xr16l2751im Datasheet - Page 50

• Manufacturer Part Number: xr16l2751im
• Description: 2.25v To 5.5v Duart With 64-byte Fifo And Powersave
• Manufacturer: Exar Corporation

XR16L2751
2.25V TO 5.5V DUART WITH 64-BYTE FIFO AND POWERSAVE
REVISION HISTORY
EXAR Corporation reserves the right to make changes to the products contained in this publication in order to
improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any
circuits described herein, conveys no license under any patent or other right, and makes no representation that
the circuits are free of patent infringement. Charts and schedules contained here in are only for illustration
purposes and may vary depending upon a user’s specific application. While the information in this publication
has been carefully checked; no responsibility, however, is assumed for inaccuracies.
EXAR Corporation does not recommend the use of any of its products in life support applications where the
failure or malfunction of the product can reasonably be expected to cause failure of the life support system or
to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless
EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has
been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately
protected under the circumstances.
Copyright 2005 EXAR Corporation
Datasheet October 2005.
Send your UART technical inquiry with technical details to hotline: [e-mail].
Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.
November 2001
March 2002
September 2002
March 2003
August 2004
April 2005
October 2005
D
ATE
Rev P1.0.0
Rev P1.1.0
Rev 1.0.0
Rev 1.1.0
Rev 1.2.0
Rev 1.2.1
Rev 1.2.2
R
EVISION
Prelim data sheet.
Corrected INT output descriptions and reset state. Clarified MCR bit-3 description.
Added 68 Mode (Motorola) Data bus timing specs. Renamed Sclk to Bclk. Changed
A0-A7 in
Release into production. Clarified RTS# pin descriptions, XTAL1 pin description,
external clock description, auto RS485 half-duplex control description, EMSR bit-3
description and updated 2.5 V, I
Updated AC Electrical Characteristics.
Added Device Status to Ordering Information. Clarified pin descriptions- changed
from using logic 1 and logic 0 to HIGH (VCC) and LOW (GND) for input and output
pin descriptions.
Updated the Data Access Times (T
Clarified Wake-up Indicator interrupt in Sleep Mode description in
Sleep Mode with Wake-Up Indicator and PowerSave Feature” on
page 20
on page 26
Figures
and
.
“Section 4.4, Interrupt Status Register (ISR) - Read-Only”
16
NOTICE
through
50
19
CC
to A0-A2.
and I
RDV
D
ESCRIPTION
and T
SLEEP
RDA
DC Electrical Characteristics.
) in AC Electrical Characteristics.
“Section 2.20,
xr
REV. 1.2.2