wm8775 Wolfson Microelectronics plc, wm8775 Datasheet - Page 24

• Manufacturer Part Number: wm8775
• Description: 24-bit, 96khz Adc With 4 Channel I/p Multiplexer
• Manufacturer: Wolfson Microelectronics plc

WM8775
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ADC GAIN CONTROL
The ADC has an analogue input PGA and digital gain control for each stereo channel. Both the
analogue and digital gains are adjusted by the same register, LAG for the left and RAG for the right.
The analogue PGA has a range of +24dB to -21dB in 0.5dB steps. The digital gain control allows
further attenuation (after the ADC) from -21.5dB to -103dB in 0.5dB steps. Table 11 shows how the
register maps the analogue and digital gains.
Table 11 Analogue and Digital Gain Mapping for ADC
Left and right inputs may also be independently muted. The LRBOTH control bit allows the user to
write the same attenuation value to both left and right volume control registers, saving on software
writes. The ADC volume and mute also applies to the bypass signal path.
In addition a zero cross detect circuit is provided for the input PGA. When ZCLA/ZCRA is set with a
write, the gain will update only when the input signal approaches zero (midrail). This minimises
audible clicks and ‘zipper’ noise as the gain values change. A timeout clock is also provided which
will generate an update after a minimum of 131072 master clocks (= ~10.5ms with a master clock of
12.288MHz). The timeout clock may be disabled by setting TOD.
REGISTER ADDRESS
Timeout Clock Disable
LAG/RAG[7:0]
CF(hex)
FE(hex)
A4(hex)
A5(hex)
FF(hex)
00(hex)
01(hex)
R7 (07h)
0000111
:
:
:
ATTENUATION
-∞ dB (mute)
3
BIT
+23.5dB
-21.5dB
-103dB
LEVEL
+24dB
-21dB
0dB
:
:
:
LABEL
TOD
DEFAULT
ANALOGUE PGA
0
+23.5dB
+24dB
-21dB
-21dB
-21dB
-21dB
0dB
:
:
:
Analogue PGA Zero cross detect
timeout disable
0 : Timeout enabled
1: Timeout disabled
DESCRIPTION
PD, Rev 4.4, October 2008
ATTENTUATION
Digital mute
DIGITAL
-0.5dB
-82dB
0dB
0dB
0dB
0dB
:
:
:
Production Data
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