wm9001 Wolfson Microelectronics plc, wm9001 Datasheet - Page 16

• Manufacturer Part Number: wm9001
• Description: 1w Dual-mode Class Ab/d Speaker Driver
• Manufacturer: Wolfson Microelectronics plc

WM9001
INPUT SIGNAL PATH
SYNC
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The line inputs to the WM9001 are identified as LIP and LIN on the pin diagram. These are a fully
balanced differential input pair, with matched impedances on both terminals. The input stage of the
WM9001 is driven by the voltage difference between these two pins. This results in a very low noise
amplifier stage, as any common mode noise (unwanted signals that are present in equal amplitude
on both pins) are cancelled out at the input and are not reproduced at the output.
The LIP input can also be configured as a single-ended line input – see Table 2 below. Single-ended
to differential conversion is carried out internally with the N channel input (normally LIN) connected to
an inverted version of the P channel (LIP). In this configuration the LIN pin should be connected to
analogue ground.
Table 2 Input Mode Control
WM9001 inputs LIP and LIN are biased to Vmid (equal to AVDD/2) therefore DC-blocking capacitors
are required when connecting non Vmid reference input signals. The Vmid pin must be decoupled
externally – see ‘Applications Information’ for more detail.
In Class D operation the WM9001 may be clocked using one of two methods.
The Clock source selection is determined automatically by the WM9001 according to the status of
the SYNC pin. If a clock signal is present on the SYNC pin, then this signal is automatically selected
as the WM9001 clock source. If the clock signal is interrupted and this pin is pulled high or low, then
the internal oscillator will be selected. It is not recommended to interrupt or change clock sources
whilst the device is enabled.
Table 3 Sync Clock Control
The SYNC pin is compatible with low voltage (eg. 1.8v) logic levels from external devices, and can
accept logic 1 digital inputs as low as 1.6V, even though the WM9001 AVDD supply minimum is
2.7V. This provides compatibility with a low voltage DVDD on a controlling device such as the
WM8991 CODEC.
Figure 6 System Clock Timing Requirements
Please refer to the Electrical Characteristics for minimum and maximum SYNC frequencies.
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•
Externally supplied clock to the SYNC pin (800kHz typical).
Internal oscillator, allowing stand-alone operation of the device.
PIN
PIN
16
5
INP_SEL
SYNC
NAME
NAME
Input Mode Select
0 = Differential Mode (LIP/LIN)
1 = Single-Ended Mode (LIP only)
Class D PWM clock input
Constant 0 / 1 - Internal Oscillator enabled
Clock - Clock used to sync PWM class D
DESCRIPTION
DESCRIPTION
PP, June 2009, Rev 3.2
Pre-Production
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