wm9707scft-v Wolfson Microelectronics plc, wm9707scft-v Datasheet - Page 29

• Manufacturer Part Number: wm9707scft-v
• Description: Ac?97 Revision 2.1 Audio Codec With Spdif Output
• Manufacturer: Wolfson Microelectronics plc

WM9707
VENDOR RESERVED REGISTERS (INDEX 5Ah - 7Ah)
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REGISTER 2Ah – EXTENDED AUDIO STATUS AND CONTROL REGISTER
The Extended Audio Status and Control Register is a read/write register that provides status and
control of the extended audio features.
Table 14 Extended Audio Status and Control Register
REGISTER 2Ch TO 32h – AUDIO SAMPLE RATE CONTROL REGISTERS
These registers are read/write registers that are written to, to select alternative sample rates for the
audio PCM converters. Default is the 48ks/s rate. Note that only Revision 2.1 recommended rates
are supported by the WM9707, selection of any other unsupported rates will cause the rate to default
to the nearest supported rate, and the supported rate value to be latched and so read back.
Note that the SPDIF mode only supports 48ks/s rate.
REGISTERS 36h AND 38h – 6 CHANNEL VOLUME CONTROL
These read/write registers control the output volume of the optional four PCM channels. (not
supported by the WM9707)
These registers are vendor specific. Do not write to these registers unless the Vendor ID register has
been checked first to ensure that the driver knows the source of the AC ‘97 component.
SPDIF DIGITAL AUDIO DATA OUTPUT – (INDEX 5Ch)
The WM9707 provides an SPDIF output. In order to enable this output, bit SPDF in Register 5Ch
should be set. Additionally, a bit SCMS in Register 5Ch may also be set, which sets the copyright
flag in the IEC958 data, allowing serial copy protect mechanisms to be removed.
The WM9707 can be programmed to automute the DACs. By setting the mute bit, the WM9707 will
mute the DACs when it detects a continuous sequence of 1024 zeros. Register 5Ch contains four
vendor specific control bits.
Table 15 SPDIF Digital Audio Data Output and Automute Control
DATA BIT
DATA BIT
MADC
CDAC
SDAC
LDAC
SPDE
SPDC
HPFD
VRM
AME
VRA
DRA
PRK
PRJ
PRL
PRI
FUNCTION
Enables variable rate audio mode
Enable double rate audio mode
Enables variable rate Mic ADC
Indicates centre DAC ready
Indicates surround DAC ready
Indicates LFE DAC ready
Indicates Mic ADC ready
Set to turn off centre DAC
Set to turn off surround DACs
Set to turn off LFE DACs
Set to turn off Mic ADC
FUNCTION
Setting this bit enables the automute function which causes the DAC PGAs (Reg 18) to
mute when the data input is zero for 1024 bits.
Setting this enables the SPDIF output. It can also be enabled by raising the SPDEN pin
(Pin 47) to DVDD.
This enables the copyright protect bit in the SPDIF data stream.
Setting this bit disables the HPF on the ADC path.
READ/WRITE
Read/write
Read/write
Read/write
Read/write
Read/write
Read/write
Read/write
Read
Read
Read
Read
PD, Rev 4.4, March 2009
WM9707 SUPPORT
Production Data
Yes
No
No
No
No
No
No
No
No
No
No
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