wm9708 Wolfson Microelectronics plc, wm9708 Datasheet - Page 22

• Manufacturer Part Number: wm9708
• Description: Ac?97 Revision 2.1 Audio Codec
• Manufacturer: Wolfson Microelectronics plc

WM9708
SERIAL INTERFACE REGISTER MAP DESCRIPTION
w
WARM WM9708 RESET
A warm WM9708 reset will re-activate the AC-link without altering the current WM9708 register
values. A warm reset is signalled by driving SYNC high for a minimum of 1μs in the absence of
BITCLK. See Figure 3.
Within normal audio frames SYNC is a synchronous input. In the absence of BITCLK, SYNC is
treated as an asynchronous input used in the generation of a warm reset to the WM9708. The
WM9708 will not respond with the activation of BITCLK until SYNC has been sampled low again by
the WM9708. This will preclude the false detection of a new audio frame.
(See Table 15)
The serial interface bits perform control functions described as follows: The register map is fully
specified by the AC’97 specification, and this description is simply repeated below, with optional
unsupported features omitted.
RESET REGISTER (INDEX 00h)
Writing any value to this register performs a register reset, which causes registers 0-2B inclusive to
revert to their default values. Reading this register returns the ID code of the part, indication of
modem support (not supported by the WM9708) and a code for the type of 3D stereo enhancement
(not supported by the WM9708).
The ID decodes the capabilities of the WM9708 based on the following:
Table 3 Reset Register Function
Note that the WM9708 defaults to indicate 18-bit compatibility.
PLAY MASTER VOLUME REGISTERS (INDEX 02h, 04h AND 06h)
These registers manage the output signal volumes. Register 02h controls the stereo master volume
(both right and left channels), Register 04h controls the optional stereo headphone out, and Register
06h controls the mono volume output. Each step corresponds to 1.5dB. The MSB of the register is
the mute bit. When this bit is set to 1 the level for that channel is set at -
ML5 to ML0 is for left channel level, MR5 to MR0 is for the right channel and MM5 to MM0 is for the
mono out channel.
Support for the MSB of the volume level is not provided by the WM9708. If the MSB is written to,
then the WM9708 detects when that bit is set and sets all 4 LSBs to 1s. Example: If the driver writes
a 1xxxxx the WM9708 interprets that as x11111. It will also respond when read with x11111 rather
than 1xxxxx, the value written to it. The driver can use this feature to detect if support for the 6th bit is
there or not.
The default value of both the mono and the stereo registers is 8000h (1000 0000 0000 0000), which
corresponds to 0dB gain with mute on.
SE4...SE0
ID0
ID1
ID2
ID3
ID4
ID5
ID6
ID7
ID8
ID9
BIT
FUNCTION
Dedicated Mic PCM in channel
Modem line codec support
Bass and treble control
Simulated stereo (mono to stereo)
Headphone out support
Loudness (bass boost) support
18-bit DAC resolution
20-bit DAC resolution
18-bit ADC resolution
20-bit ADC resolution
No 3D support
∞
dB.
PD, Rev 4.2, August 2009
VALUE ON WM9708
Production Data
00000
0
0
0
0
1
0
1
0
1
0
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