isppac-powr607 Lattice Semiconductor Corp., isppac-powr607 Datasheet - Page 11

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isppac-powr607

Manufacturer Part Number
isppac-powr607
Description
N-system Programmable Power Supply Supervisor, Reset Generator And Watchdog Tim
Manufacturer
Lattice Semiconductor Corp.
Datasheet

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Lattice Semiconductor
Each comparator outputs a HIGH signal to the PLD array if the voltage at its positive terminal (VMONx pin) is
greater than its programmed trip point setting, otherwise it outputs a LOW signal.
A hysteresis of approximately 1% of the setpoint is provided by the comparators to reduce false triggering as a
result of input noise. The hysteresis provided by the voltage monitor is a function of the input divider setting.
Table 4-3 lists the typical hysteresis versus voltage monitor trip-point.
Programmable Over-Voltage and Under-Voltage Thresholds
Figure 4-9 (a) shows the power supply ramp-up and ramp-down voltage waveforms. Because of hysteresis, the
comparator outputs change state at different thresholds depending on the direction of excursion of the monitored
power supply.
Figure 4-9. (a) Power Supply Voltage Ramp-up and Ramp-down Waveform and the Resulting Comparator
Output, (b) Corresponding to Upper and Lower Trip Points
During power supply ramp-up the comparator output changes from logic 0 to 1 when the power supply voltage
crosses the upper trip point (UTP). During ramp down the comparator output changes from logic state 1 to 0 when
the power supply voltage crosses the lower trip point (LTP). To monitor for over voltage fault conditions, the UTP
should be used. To monitor under-voltage fault conditions, the LTP should be used.
Tables 1 and 2 show both the under-voltage and over-voltage trip points, which are automatically selected in soft-
ware depending on whether the user is monitoring for an over-voltage condition or an under-voltage condition.
Comparator Logic Output
UTP
4-11
LTP
ispPAC-POWR607 Data Sheet
(a)
(b)

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