wm8805 Wolfson Microelectronics plc, wm8805 Datasheet

wm8805

Manufacturer Part Number

wm8805

Description

8 1 Digital Interface Transceiver With Pll

Manufacturer

Wolfson Microelectronics plc

Datasheet

1.WM8805.pdf (66 pages)

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Meier Automation Equipment Co., Limited

Part Number:

wm8805GEDS

Manufacturer:

Quantity:

20 000

Company:

Amily Shenzhen XNWY Technology Co., Ltd

Part Number:

wm8805GEDS/RV

Current page: 1 of 66
Download datasheet (873Kb)

DESCRIPTION

The WM8805 is a high performance consumer mode

S/PDIF transceiver with support for 8 received Channels

and 1 transmitted Channel.

A crystal derived, or externally provided high quality master

clock is used to allow low jitter recovery of S/PDIF supplied

master clocks.

Generation of all typically used audio clocks is possible

using the high performance internal PLL. A dedicated

CLKOUT pin provides a high drive clock output.

A pass through option is provided which allows the device

simply to be used to clean up (de-jitter) the received digital

audio signals.

The device may be used under software control or stand

alone hardware control modes. In software control mode,

both 2-wire with read back and 3-wire interface modes are

supported.

Status and error monitoring is built-in and results can be

read back over the control interface, on the GPO pins or

streamed over the audio data interface in ‘With Flags’ mode

(audio data with status flags appended).

The audio data interface supports I

justified and DSP audio formats of 16-24 bit word length,

with sample rates from 32 to 192ks/s.

The device is supplied in a 28-lead Pb-free SSOP package.

BLOCK DIAGRAM

WOLFSON MICROELECTRONICS plc

To receive regular email updates, sign up

8:1 Digital Interface Transceiver with PLL

S, left justified, right

http://www.wolfsonmicro.com/enews/

FEATURES

•

APPLICATIONS

•

Surround Sound AV processors and Hi-Fi systems

Music industry applications

DVD-P/DVD-RW

Digital TV

S/PDIF (IEC60958-3) compliant.

Advanced jitter attenuating PLL with low intrinsic period

jitter of 50 ps RMS.

S/PDIF recovered clock using PLL, or stand alone crystal

derived clock generation.

Supports 10 – 27MHz crystal clock frequencies.

2-wire / 3-Wire serial or hardware control interface.

Programmable Audio data interface modes:

8 channel receiver input and 1 channel transmit output.

Auto frequency detection / synchronisation.

Selectable output status data bits.

Up to 8 configurable GPO pins.

De-emphasis flag output.

Non-audio detection including DOLBY

Channel status changed flag.

Configurable clock distribution with selectable output

MCLK rate of 512fs, 256fs, 128fs and 64fs.

2.7 to 3.6V digital and PLL supply voltages.

28-lead SSOP package.

16/20/24 bit word lengths

S, Left, Right Justified or DSP

Production Data, March 09, Rev 4.5

WM8805

and DTS

Related parts for wm8805

Related keywords

wm8805 datasheet
wm8805 data sheet
wm8805 pdf datasheet
wm8805 component
wm8805 part
wm8805 distributor
wm8805 RoHS
wm8805 datasheet download