ox16cf950 ETC-unknow, ox16cf950 Datasheet
ox16cf950
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ox16cf950 Summary of contents
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F EATURES Single full-duplex asynchronous channel 128-byte deep transmitter / receiver FIFO Fully software compatible with industry standard 16C550 type UARTs Readable FIFO levels System clock up to 60MHz at 5V, 50 MHz at 3.3V Flexible clock prescaler from 1 ...
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OXFORD SEMICONDUCTOR LTD. C ONTENTS FEATURES.....................................................................................................................................................................................1 DESCRIPTION...............................................................................................................................................................................1 CONTENTS.....................................................................................................................................................................................2 1 BLOCK DIAGRAM ..............................................................................................................................................................5 2 PIN INFORMATION ............................................................................................................................................................ 6 3 PIN DESCRIPTIONS ..........................................................................................................................................................6 4 CONFIGURATION & OPERATION...............................................................................................................................9 5 PCMCIA / CF TARGET CONTROLLER....................................................................................................................10 5.1 OPERATION........................................................................................................................................................................ 10 5.2 CONFIGURATION SPACE (CARD INFORMATION STRUCTURE) ...
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OXFORD SEMICONDUCTOR LTD. 6.6.3 INTERRUPT DESCRIPTION .......................................................................................................................................... 33 6.6.4 SLEEP MODE ................................................................................................................................................................. 34 6.7 MODEM INTERFACE......................................................................................................................................................... 34 6.7.1 MODEM CONTROL REGISTER ‘MCR’.......................................................................................................................... 34 6.7.2 MODEM STATUS REGISTER ‘MSR’............................................................................................................................. 35 6.8 OTHER STANDARD REGISTERS ..................................................................................................................................... 35 6.8.1 DIVISOR LATCH REGISTERS ‘DLL ...
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OXFORD SEMICONDUCTOR LTD. 11 PACKAGE INFORMATION .......................................................................................................................................57 12 ORDERING INFORMATION......................................................................................................................................58 NOTES............................................................................................................................................................................................59 CONTACT DETAILS .................................................................................................................................................................60 DISCLAIMER...............................................................................................................................................................................60 OXCF950 DATA SHEET V1.1 Page 4 ...
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OXFORD SEMICONDUCTOR LTD LOCK IAGRAM 1 A[3:0] D[7:0] CE[1]# REG# OE# PC Card Interface WE# and Control IREQ# IORD# IOWR# RESET IOIS16# XTLI Clock & Baudrate Generator XTLO EE_DO EE_DI EEPROM Interface EE_CK EE_CS Config MODE Interface ...
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... UART / Local Bus Function OX16CF950 Figure 2: Pin Information Dir Name Description 1 I A[3:0] PCMCIA/CF address bus, bits [3:0] I/O D[7:0] PCMCIA/CF data bi-directional bus. IU REG# ...
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OXFORD SEMICONDUCTOR LTD SIN UART serial data input. IrDA_In UART IrDA data input when IrDA mode is enabled (see above). I DCD# Active-low modem data-carrier-detect input. ...
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OXFORD SEMICONDUCTOR LTD. EEPROM Miscellaneous Pins 18 Power and Ground 2 39, 19, 8 40, 22, 9 Note 1: Direction key: I Input IU Input with internal pull-up ID Input with external pull-down O ...
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OXFORD SEMICONDUCTOR LTD & O ONFIGURATION PERATION PCMCIA and CF host systems allow for hot insertion of cards. Once a card has been inserted into a host system, the host system will configure it. The PCMCIA standard defines ...
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OXFORD SEMICONDUCTOR LTD. 5 PCMCIA / CF T ARGET 5.1 Operation Note: See section 10 for timing waveforms. The OXCF950 responds to a number of different CF/PCMCIA accesses (detailed below). Section 11 contains timing diagrams and information for each of ...
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OXFORD SEMICONDUCTOR LTD. 5.2.2 Normal Mode Space Map Direct 0xFF NOT VALID Common 0x80 0x7F Additional Storage Space, which can be downloaded from the EEPROM. 0x00 0xFF Function Configuration Registers 0xF8 0xF6 Main CIS either: Attribute a) Normal Default (Valid ...
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OXFORD SEMICONDUCTOR LTD. 5.3.3 Accessing Local Configuration Registers The local configuration registers are a set of device specific registers, which can be accessed via standard IO mapping. As the device is configured as a single function device, no base address ...
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OXFORD SEMICONDUCTOR LTD. Multi-Purpose I/O Configuration register ‘MIC’ (Offset 0x09) This register configures the operation for the multi - purpose I/O pins ‘MIO[1:0]’ as follows Bits Description 7:4 Reserved 3:2 MIO1 Configuration register 00 -> MIO1 is a non-inverting input ...
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OXFORD SEMICONDUCTOR LTD. Interrupt Status and Control register ‘ISR’ (Offset 0x0C) This register controls the assertion of interrupts from the User I/O pins (MIO[1:0]) as well as returning the internal status of the interrupt sources. Bits Description 7:5 Reserved 4 ...
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OXFORD SEMICONDUCTOR LTD. Divide Value field in the DIV local configuration register (see section 6.3.4.3). This allows the length of the pulse to be varied, so that different clock frequencies can be used and the pulse can still be kept ...
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OXFORD SEMICONDUCTOR LTD. 5.5.1 Configuration Options Register ‘COR’ (offset 0xF8) The configuration options register is used to configure PCMCIA/CF cards that have programmable address decoders. Once the card’s client driver has successfully parsed the CIS, it will attempt to obtain ...
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OXFORD SEMICONDUCTOR LTD. IOIs8 R/W RFU - Audio R/W 2 PwdDwn R/W 3 Intr R IntrAck R/W Note 1 The STSCHG# signal is optional and is not supported on the OXCF950, to reduce the complexity of the device. Note 2 ...
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OXFORD SEMICONDUCTOR LTD. written by the host. CREADY This bit is set (1) when the corresponding bit, RREADY, changes state. This bit may also be written by the host. CWProt This bit is set (1) when the corresponding bit, RWProt, ...
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OXFORD SEMICONDUCTOR LTD. 5.6 Card Information Structure 5.6.1 Local Bus Mode Value Tuple Name (Hex) Direct Attribute 0x01 CISTPL_DEVICE 0x02 0x00 0xFF 0x03 CISTPL_INDIRECT 0x00 0xFF CISTPL_END Indirect Attribute 0x13 CISTPL_LINKTARGET 0x03 0x43 0x49 0x53 0x1C CISTPL_DEVICE_OC 0x03 0x03 0x00 ...
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OXFORD SEMICONDUCTOR LTD. 0x47 0x45 0x4E 0x45 0x52 0x49 0x43 0x00 0x00 0x00 0xFF 0x1A CISTPL_CONFIG 0x04 0x00 0x02 0xF8 0x0F 0x1B CISTPL_CFTABLE_ENTRY 0x0D 0xC1 0x41 0x99 0x01 0xB5 0x1E 0xA0 0x40 0x0F 0xB0 0xFF 0xFF 0x07 0x1B CISTPL_CFTABLE_ENTRY 0x04 ...
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OXFORD SEMICONDUCTOR LTD. 0x1C CISTPL_DEVICE_OC 0x03 0x03 0x00 0xFF 0x20 CISTPL_MANFID 0x04 0x79 0x02 0x0B 0x95 0x21 CISTPL_FUNID 0x02 0x02 0x01 0x22 CISTPL_FUNCE 0x04 0x00 0x02 0x0F 0x7F 0x15 CISTPL_VERS_1 0x15 0x07 0x01 0x43 0x46 0x20 0x43 0x41 0x52 0x44 ...
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OXFORD SEMICONDUCTOR LTD. 0xC1 0x41 0x99 0x01 0xB5 0x1E 0xA8 0x60 0xF8 0x03 0x0F 0xB0 0xFF 0xFF 0x07 0x1B CISTPL_CFTABLE_ENTRY 0x03 0x02 0x08 0x2F 0x1B CISTPL_CFTABLE_ENTRY 0x0E 0xC3 0x41 0x99 0x01 0x55 0xA8 0x60 0xF8 0x03 0x0F 0xB0 0xFF 0xFF ...
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OXFORD SEMICONDUCTOR LTD 950 UART NTERNAL The internal UART within the OXCF950 is based on the 16C950 rev B, and is henceforth referred to as the 950 core. Some modes of the 16C950 rev ...
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OXFORD SEMICONDUCTOR LTD. enabled using the Additional Control Register ‘ACR’ (see section 6.11.3). In addition to larger FIFOs and higher baud rates, the enhancements of the 950 over the 16C654 are: Selectable arbitrary trigger levels for the receiver and transmitter ...
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OXFORD SEMICONDUCTOR LTD. 6.2 Register Description Tables The three address lines select the various registers in the UART. Since there are more than 8 registers, selection of the registers is also dependent on the state of the Line Control Register ...
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OXFORD SEMICONDUCTOR LTD. Register Address R/W Name To access these registers LCR must be set to 0xBF EFR 010 R/W XON1 100 R/W 9-bit mode XON2 101 R/W 9-bit mode XOFF1 110 R/W 9-bit mode XOFF2 111 R/W 9-bit mode ...
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OXFORD SEMICONDUCTOR LTD. Register SPR R/W Name Offset 10 Indexed Control Register Set ACR 0x00 R/W CPR 0x01 R/W TCR 0x02 R/W CKS 0x03 R/W TTL 0x04 R/W Unused RTL 0x05 R/W Unused FCL 0x06 R/W Unused FCH 0x07 R/W ...
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OXFORD SEMICONDUCTOR LTD. Writing to ICR registers: Ensure that the last value written to LCR was not 0xBF (reserved for 650 compatible register access value). Write the desired offset to SPR (address 111 Write the desired value to ICR (address ...
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OXFORD SEMICONDUCTOR LTD. Register ‘LSR’ (see section 6.5.3). Interrupts can be generated or DMA signals can be used to transfer data to/from the FIFOs. The number of items in each FIFO may also be read back from the transmitter FIFO ...
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OXFORD SEMICONDUCTOR LTD. 6.5 Line Control & Status 6.5.1 False Start Bit Detection On the falling edge of a start bit, the receiver will wait for 1/2 bit and re-synchronise the receiver’s sampling clock onto the centre of the start ...
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OXFORD SEMICONDUCTOR LTD. bit mode LSR[ longer a flag and corresponds to the 9 bit of the received data in RHR. th LSR[3]: Received data framing error logic 0 No framing error. logic 1 Data has been received ...
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OXFORD SEMICONDUCTOR LTD. 6.6 Interrupts & Sleep Mode The serial interrupt on the OXCF950 is routed through to the OXCF950 interrupt control, regardless of MCR[3]. 6.6.1 Interrupt Enable Register ‘IER’ Serial channel interrupts are enabled using the Interrupt Enable Register ...
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OXFORD SEMICONDUCTOR LTD. 6.6.2 Interrupt Status Register ‘ISR’ The source of the highest priority interrupt pending is indicated by the contents of the Interrupt Status Register ‘ISR’. There are nine sources of interrupt at six levels of priority (1 is ...
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OXFORD SEMICONDUCTOR LTD cleared on an ISR read of a level 5 interrupt. Level 6: CTS or RTS changed interrupt (ISR[5:0]=’100000’): This interrupt is set whenever either of the CTS# or RTS# pins changes state from low to ...
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OXFORD SEMICONDUCTOR LTD. In non-enhanced mode, this bit enables the CTS/RTS out- of-band flow control. MCR[6]: IrDA mode logic 0 Standard serial receiver and transmitter data format. logic 1 Data will be transmitted and received in IrDA format. This function ...
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OXFORD SEMICONDUCTOR LTD. unused data format. Writing 0xBF to LCR will set LCR[7] but leaves LCR[6:0] unchanged. Therefore, the data format of the transmitter and receiver data is not affected. Write the desired LCR value to exit from this selection. ...
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OXFORD SEMICONDUCTOR LTD. 6.9.2 Special Character Detection In Enhanced mode (EFR[4]=1), when special character detection is enabled (EFR[5]=1) and the receiver matches received data with XOFF2, the 'received special character' flag ASR[4] will be set and a level 5 interrupt ...
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OXFORD SEMICONDUCTOR LTD Sample clock values defined in TCR[3:0] Divisor = DLL + ( 256 x DLM ) Prescaler = 1 when MCR[7] = ‘0’ else where CPR[7:3] ...
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OXFORD SEMICONDUCTOR LTD. TCR[3:0] Clock cycles per bit 0000 to 0011 0100 to 1111 Table 33: TCR Sample Clock Configuration The use of TCR does not require the device 650 or 950 mode although only drivers that ...
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OXFORD SEMICONDUCTOR LTD. Designers have the option of using either TTL clock modules or crystal oscillator circuits for system clock input, with minimal additional components. The following two sections describe how each can be connected. 6.10.5 TTL Clock Module Using ...
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OXFORD SEMICONDUCTOR LTD. loopback mode this bit reflects the flow control status rather than the pin’s actual state. ASR[3]: DTR This is the complement of the actual state of the DTR# pin when the device is not in loopback mode. ...
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OXFORD SEMICONDUCTOR LTD. logic [11] DTR# pin is configured to drive the active- high enable pin of an external RS485 buffer. In this configuration, the DTR# pin will be forced high whenever the transmitter is not empty (LSR[6]=0), otherwise DTR# ...
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OXFORD SEMICONDUCTOR LTD. register, at which point an XON character is sent. The FCL value of 0x00 is illegal. For example if FCL and FCH contain 64 and 100 respectively, XOFF is transmitted when the receiver FIFO contains 100 characters, ...
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OXFORD SEMICONDUCTOR LTD. should write the 9th (MSB) data bit in SPR[0] first and then write the other 8 bits to THR. As parity mode is disabled, LSR[7] is set whenever there is an overrun, framing error or received break ...
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OXFORD SEMICONDUCTOR LTD. MDM[7:4]: Reserved These bits must be set to ‘0000’ 6.11.11 Readable FCR ‘RFC’ The RFC register is located at offset 0x0F of the ICR This read-only register returns the current state of the FCR register (Note that ...
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OXFORD SEMICONDUCTOR LTD EEPROM S ERIAL PECIFICATION The OXCF950 can be configured using an optional serial electrically-erasable programmable read only memory (EEPROM). If the EEPROM is not present, the device will remain in its default configuration after reset. ...
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OXFORD SEMICONDUCTOR LTD. Bits 15 The programming data for each zone follows the proceeding zone if it exists. For example a header value of 0xB127 indicates that all zones exist and they follow one another, while ...
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OXFORD SEMICONDUCTOR LTD. Bits 15 14:8 7:0 7.5 Zone 3 : Function Access (UART) Zone 3 allows the UART to be pre-configured, prior to any CF/PCMCIA accesses. This is very useful when the UART needs to run with (typically generic) ...
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OXFORD SEMICONDUCTOR LTD PERATING ONDITIONS Symbol Parameter V DC supply voltage input voltage input current IN T Storage temperature STG Symbol Parameter V DC supply voltage DD T Operating Temperature range ...
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OXFORD SEMICONDUCTOR LTD LECTRICAL HARACTERISTICS 9.1 5V Operation Symbol Parameter V Supply voltage DD V Input high voltage IH V Input low voltage IL V Schmitt Hysteresis H C Capacitance of input buffers IL C Capacitance ...
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OXFORD SEMICONDUCTOR LTD. 9.2 3V Operation Symbol Parameter V Supply voltage DD V Input high voltage IH V Input low voltage IL V Schmitt Hysteresis H C Capacitance of input buffers IL C Capacitance of output buffers OL I Input ...
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OXFORD SEMICONDUCTOR LTD IMING AVEFORMS 10.1 Common Memory Access A[3:0], REG# CE1# OE# D[7:0] WE#, IORD#, IOWR#, RESET A[3:0], REG# CE1# OE# WE# D[7: D[7: out IORD#, ...
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OXFORD SEMICONDUCTOR LTD. Symbol Read Access Min (ns (CE (OE (OE) dis t ( (WE) en Table 47: Common Memory Access Timing Specification 10.2 Attribute Memory ...
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OXFORD SEMICONDUCTOR LTD. Symbol Read Access Min (ns (CE (OE (OE) dis t ( (WE) en Table 50: Attribute Memory Access Timing Specification 10.3 I/O Access ...
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OXFORD SEMICONDUCTOR LTD. Symbol Read Access Min (ns) 3 (IORD REG (IORD (IORD (IORD (IORD (IOWR REG (IOWR ...
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OXFORD SEMICONDUCTOR LTD. A[3:0] REG# CE1# IOWR (LB_CS) su LB_CS# LB_WR# OE#, WE#, IORD#, RESET Symbol Read Access Min (ns) 3 (LB_CS (LB_CS IORD (LB_RD IORD ...
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OXFORD SEMICONDUCTOR LTD ACKAGE NFORMATION # Dimension Min Nom D 9.00 BSC DL 7.00 BSC E 9.00 BSC EL 7.00 BSC A A1 0.05 A2 0.95 1.00 b 0.17 0.22 e 0.50 ...
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OXFORD SEMICONDUCTOR LTD RDERING NFORMATION OX16 CF950- Revision Package Type – 48 TQFP OXCF950 DATA SHEET V1.1 Page 58 ...
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OXFORD SEMICONDUCTOR LTD. N OTES This page has been intentionally left blank OXCF950 DATA SHEET V1.1 Page 59 ...
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OXFORD SEMICONDUCTOR LTD ONTACT ETAILS Oxford Semiconductor Ltd. 25 Milton Park Abingdon Oxfordshire OX14 4SH United Kingdom +44 (0)1235 824900 Telephone: +44 (0)1235 821141 Fax: sales@oxsemi.com Sales e-mail: http://www.oxsemi.com Web site: D ISCLAIMER Oxford Semiconductor believes the information ...