ox16cf950 ETC-unknow, ox16cf950 Datasheet - Page 12

• Manufacturer Part Number: ox16cf950
• Description: Cost Asynchronous Card
• Manufacturer: ETC-unknow

CF/PCMCIA offset from address 0 for local
configuration registers in IO space (hex)
8
9
A
B
C
D
E
F
5.3.3
The local configuration registers are a set of device specific registers, which can be accessed via standard IO mapping. As the
device is configured as a single function device, no base address is required to access the local configuration registers. Since IO
mapping is used, access to the local configuration registers is permitted only after the card has been configured. Once the
Configuration Options Register has been set in the Attribute area, the local configuration registers can be accessed following the
mapping shown in Table 5. This access is always permitted in Normal Mode. In Local Bus Mode access is only permitted if bit[0]
is set to ‘1’ in the MDR register in the UART, otherwise the local bus will be accessed rather than the local configuration
registers.
Each of the local configuration registers are explained in the following sections
EEPROM Status and Control register ‘ESC’(Offset 0x08)
This register defines the control on the serial EEPROM. The individual bits are described in Table 6.
Bits
7:5
4
3
2
1
0
OXFORD SEMICONDUCTOR LTD.
Accessing Local Configuration Registers
Description
Reserved
EEPROM Data In.
For reads from the EEPROM this input bit is the output - data (DO) of the
external EEPROM connected to EE_DI pin
EEPROM Data Out.
For writes to the EEPROM, this output bit feeds the input - data of the
external EEPROM (DI). This bit is output on the devices EE_DO and
clocked into the EEPROM by EE_CK
EEPROM Clock.
For reads or writes to the external EEPROM toggle this bit to generate an
EEPROM clock (EE_CK pin)
EEPROM Chip Select.
When ‘1’ the EEPROM chip select pin EE_CS is activated (high). When ‘0’
EE_CS is de-activated (low)
EEPROM Valid
A ‘1’ indicates that a valid EEPROM program header is present
Table 5: Local Configuration Register's mapping in I/O space
Table 6: EEPROM Status and Control Register
Register Map
EEPROM Status and Control register
Multi-Purpose I/O Configuration register
UART Divider/Interrupt Pulse Width Divider register
Mode Status register
Interrupt Status register
Soft UART/Local Bus reset register
Reserved
Reserved
OXCF950 DATA SHEET V1.1
EEPROM
-
-
-
-
-
-
Read/Write
PCMCIA
R/W
R/W
R/W
R
R
R
Reset
Page 12
000
X
0
0
0
X