ht82m99e Holtek Semiconductor Inc., ht82m99e Datasheet - Page 20

• Manufacturer Part Number: ht82m99e
• Description: Ht82m99e/ht82m99a -- Usb Mouse Encoder 8-bit Mcu
• Manufacturer: Holtek Semiconductor Inc.

There are some timing constrains and usages illustrated here. By setting the MISC register, the MCU can perform read-
ing, writing and clearing actions. There are some examples shown in the following table for endpoint FIFO reading, writ-
ing and clearing.
Note: *: There are 2 s gap existing between 2 reading actions or between 2 writing actions
USB Active Pipe Timing
The USB active pipe accessed by the host cannot be used by the MCU simultaneously. When the host finishes its work,
the signal, a USB_INT will be produced to tell the MCU that the pipe can be used and the acted pipe No. will be shown
in the signal, ACT_PIPE as well. The timing is illustrated in the Figure below.
Suspend Wake-Up and Remote Wake-Up
If there is no signal on the USB bus for over 3ms, the
HT82M99E will go into a suspend mode. The Suspend
line (bit 0 of the USC) will be set to 1 and a USB interrupt
is triggered to indicate that the HT82M99E should jump
to the suspend state to meet the 500 A USB suspend
current spec.
In order to meet the 500 A suspend current, the pro-
grammer should disable the USB clock by clearing the
USBCKEN (bit3 of the SCC) to 0 . The suspend cur-
rent is 400 A.
The user can also further decrease the suspend current
to 250 A by setting the SUSP2 (bit4 of the SCC). But if
the SUSP2 is set, the user has to make sure not to en-
able the LVR OPT option, otherwise the HT82M99E will
be reset.
When the resume signal is sent out by the host, the
HT82M99E will wake-up the MCU by USB interrupt and
Rev. 2.20
Read FIFO0 sequence
Write FIFO1 sequence
Check whether FIFO0 can be read or not
Check whether FIFO1 can be written to or not
Write 0-sized packet sequence to FIFO 0
Register Name
FIFO 0
FIFO 1
Actions
R/W
R/W
R/W
FIFO Register Address Table
USB Active Pipe Timing
00H 01H delay of 2 s, check 41H read* from FIFO0 register
and check if not ready (01H) 03H 02H
0AH 0BH delay of 2 s, check 4BH write* to FIFO1 register and
check if not ready (0BH) 09H 08H
00H 01H delay of 2 s, check 41H (if ready) or 01H (if not
ready) 00H
0AH 0BH delay of 2 s, check 4BH (if ready) or 0BH (if not
ready) 0AH
02H 03H delay of 2 s, check 43H 01H 00H
20
the Resume line (bit 3 of the USC) is set. In order to
make the HT82M99E function properly, the programmer
must set the USBCKEN (bit 3 of the SCC) to 1 and clear
the SUSP2 (bit4 of the SCC). Since the Resume signal
will be cleared before the Idle signal is sent out by the
host and the Suspend line (bit 0 of the USC) is going to
(bit0 of the USC), the Resume line should be remem-
bered and taken into consideration.
After finishing the resume signal, the suspend line will
go inactive and a USB interrupt is triggered. The follow-
ing is the timing diagram:
0 . So when the MCU is detecting the Suspend line
Register Address
MISC Setting Flow and Status
01001000B
01001001B
HT82M99E/HT82M99A
Data7~Data0
Data7~Data0
Bit7~Bit0
April 16, 2008