hn58x2508fpie Renesas Electronics Corporation., hn58x2508fpie Datasheet - Page 9

• Manufacturer Part Number: hn58x2508fpie
• Description: Electrically Erasable And Programmable Read Only Memory
• Manufacturer: Renesas Electronics Corporation.

HN58X2508I/HN58X2516I
Functional Description
Status Register
The following figure shows the Status Register Format. The Status Register contains a number of status and control
bits that can be read or set (as appropriate) by specific instructions.
Status Register Format
WIP bit: The Write In Progress (WIP) bit indicates whether the memory is busy with a Write or Write Status Register
cycle.
WEL bit: The Write Enable Latch (WEL) bit indicates the status of the internal Write Enable Latch.
BP1, BP0 bits: The Block Protect (BP1, BP0) bits are non-volatile. They define the size of the area to be software
protected against Write instructions.
SRWD bit: The Status Register Write Disable (SRWD) bit is operated in conjunction with the write protect (W) signal.
The Status Register Write Disable (SRWD) bit and write protect (W) signal allow the device to be put in the Hardware
Protected mode. In this mode, the non-volatile bits of the Status Register (SRWD, BP1, BP0) become read-only bits.
Instructions
Each instruction starts with a single-byte code, as summarized in the following table . If an invalid instruction is sent
(one not contained in the following table), the device automatically deselects itself.
Instruction Set
WREN
WRDI
RDSR
WRSR
READ
WRITE
Rev.3.00, Jul.05.2005, page 9 of 20
Instruction
SRWD
Status Register Write Disable
b7
Write Enable
Write Disable
Write to Memory Array
0
Read Status Register
Write Status Register
Read from Memory Array
0
0
Description
Block Protect Bits
Write Enable Latch Bits
BP1
Write In Progress Bits
BP0
WEL
WIP
b0
Instruction Format
0000 0110
0000 0100
0000 0101
0000 0001
0000 0011
0000 0010