92hd89c Integrated Device Technology, 92hd89c Datasheet - Page 33

• Manufacturer Part Number: 92hd89c
• Description: Six Channel Hd Audio Codec
• Manufacturer: Integrated Device Technology

92HD89C
Six channel HD Audio codec optimized for low power
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
IDT™ CONFIDENTIAL
2.19. HD Audio ECR 15b support
2.20. Digital Core Voltage Regulator
2.18.4. Vref_Out/GPIO Selection
2.18.5. EAPD/SPDIF_OUT/GPIO0 Selection
2 functions are available on the VrefOut-A/GPIO1 and VrefOut-E/GPIO2 pins. To determine which
function is enabled, the order of precedence is followed:
If GPIO is enabled for that pin, it overrides the VrefOut function for that pin.
If the GPIO function is not enabled for that pin, then the VrefOut function is enabled and in its pro-
grammed state.
3 functions are available on the EAPD/SPDIF_OUT1/GPIO0 pin. To determine which function is
enabled, the order of precedence is followed:
Default at power-on is EAPD
If GPIO is enabled for that pin, it overrides the SPDIF_OUT and EAPD functions for that pin.
If the GPIO function is not enabled for that pin, then the SPDIF_OUT function may be enabled by
setting the pin output enable to 1.
Although ECR15b is not yet complete (not a DCN), the 92HD89C will implement complete support
for the specification building on the support already present in previous products. ECR 15b features
supported are:
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The digital core operates at 1.5V. Many systems require that the CODEC use a single 3.3V digital
supply, so an integrated regulator is included on die. The regulator uses pin 9, DVDD, as its voltage
source. The output of the LDO is connected to pin 1 and the digital core. A 10uF capacitor must be
placed on pin 1 for proper load regulation and regulator stability.
The digital core voltage regulator is only dependent on DVDD. DVDDIO may be either 3.3 or 1.5V
and may precede or follow DVDD in sequence. The CODEC digital logic and I/O (unless referenced
to AVDD) will operate in the absence of AVDD. DVDD and AVDD supply sequencing for the applica-
tion of power and the removal of power is neither defined nor guaranteed. It is common for desktop
systems to supply AVDD from the system standby supply and the CODEC will tolerate, indefinitely,
the condition where AVDD is active but DVDD and DVDDIO are inactive.
Persistence of many configuration options through bus and function group reset.
The ability to support port presence detect in D3 even when the HD Audio bus is in a low power
state (no clock.)
Fast resume times from low power states: 1ms D1 to D0, 2ms D2 to D0, 10mS D3 to D0.
Notification if persistent register settings have been unexpectedly reset.
SPDIF active in D3 (required)
The ability to notify the driver that a clock is necessary so entering D3 with the clock stopped is
not permissible.
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92HD89C