92hd89c Integrated Device Technology, 92hd89c Datasheet - Page 68

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92hd89c

Manufacturer Part Number
92hd89c
Description
Six Channel Hd Audio Codec
Manufacturer
Integrated Device Technology
Datasheet
92HD89C
Six channel HD Audio codec optimized for low power
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
IDT™ CONFIDENTIAL
Field Name
OD0
Field Name
Rsvd
Mono0
PhAdj
Rate
Reg
Reg
Get
Set
Set
7.4.20. AFG (NID = 01h): DMic
7.4.21. AFG (NID = 01h): DACMode
Byte 4 (Bits 31:24)
Byte 4 (Bits 31:24)
Bits
0
GPIO0 Drive Mode: 0 = push-pull (drive 0 and 1); 1 = open-drain (drive 0, float
for 1).
Bits
31:5
Reserved.
4
DMic0 mono select: 0 = stereo operation, 1 = mono operation (left channel du-
plicated to the right channel).
3:2
Selects what phase of the DMic clock the data should be latched:
0h = left data rising edge/right data falling edge
1h = left data center of high/right data center of low
2h = left data falling edge/right data rising edge
3h = left data center of low/right data center of high
1:0
Selects the DMic clock rate:
0h = 4.704MHz
1h = 3.528MHz
2h = 2.352MHz
3h = 1.176MHz.
Byte 3 (Bits 23:16)
Byte 3 (Bits 23:16)
R/W
RW
R/W
R
RW
RW
RW
F7800h
Default
0h
Default
0000000h
0h
0h
2h
68
Byte 2 (Bits 15:8)
Byte 2 (Bits 15:8)
Reset
POR - DAFG - ULR
Reset
N/A (Hard-coded)
POR
POR
POR
Byte 1 (Bits 7:0)
Byte 1 (Bits 7:0)
778h
780h
V 0.91 08/09
92HD89C

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