mh1020 Music Semiconductors, Inc., mh1020 Datasheet - Page 4

• Manufacturer Part Number: mh1020
• Description: Hla Packaged Asynchronous Data Recognition And Recall Processor
• Manufacturer: Music Semiconductors, Inc.

/W (Write Enable, Input, TTL)
The /W input selects the direction of data flow during a
device cycle. /W LOW selects a Write cycle and /W HIGH
selects a Read cycle.
/CM (Data/Command Select, Input, TTL)
The /CM input selects whether the input signals on
DQ15–0 are data or commands. /CM LOW selects
Command cycles and /CM HIGH selects Data cycles.
/EC (Enable Daisy Chain, Input, TTL)
The /EC signal performs two functions. The /EC input
enables the /MF output to show the results of a
comparison, as shown in Figure 8 on page 15. If /EC is
LOW at the falling edge of /E in a given cycle, the /MF
output is enabled. Otherwise, the /MF output is held
HIGH.
The /EC signal also enables the /MF–/MI daisy chain,
which serves to select the device with the highest-priority
match in a string of MHs. Table 4 explains the effect of the
/EC signal on a device with or without a match in both
Standard and Enhanced modes. /EC must be HIGH during
initialization.
DQ15–0 (Data Bus, I/O, TTL)
The DQ15–0 lines convey data, commands, and status to
and from the MH. /W and /CM control the direction and
nature of the information that flows to or from the device.
When /E is HIGH, DQ15–0 go to HIGH-Z.
/MF (Match Flag, Output, TTL)
The /MF output goes LOW when one or more valid
matches occur during a compare cycle. /MF becomes valid
after /E goes HIGH on the cycle that enables the daisy
chain (on the first cycle that /EC is registered LOW by the
previous falling edge of /E; see Figure 8 on page 15). In a
daisy chain, valid match(es) in higher priority devices are
passed from the /MI input to /MF. If the daisy chain is
enabled but the match flag is disabled in the Control
register, the /MF output only depends on the /MI input of
the device (/MF=/MI). /MF is HIGH if there is no match
or when the daisy chain is disabled (/E goes HIGH when
/EC was HIGH on the previous falling edge of /E). The
System Match flag is the /MF pin of the last device in the
daisy chain. /MF is reset when the active configuration
register set is changed.
/MI (Match Input, Input, TTL)
The /MI input prioritizes devices in vertically cascaded
systems. It is connected to the /MF output of the previous
device in the daisy chain. The /MI pin on the first device in
the chain must be tied HIGH.
4
/MA (Device Match Flag, Output, TTL)
The /MA output is LOW when one or more valid matches
occur during the current or the last previous compare
cycle. The /MA output is not qualified by /EC or /MI, and
reflects the match flag from that specific device’s Status
register. /MA is reset when the active register set is
changed.
/MM (Device Multiple Match Flag, Output, TTL)
The /MM output is LOW when more than one valid match
occurs during the current or the last previous compare
cycle. The /MM output is not qualified by /EC or /MI, and
reflects the multiple match flag from that specific device’s
Status register. /MM is reset when the active register set is
changed.
/FF (Full Flag, Output, TTL)
If enabled in the Control register, the /FF output goes
LOW when no empty memory locations exist within the
device (and in the daisy chain above the device as
indicated by the /FI pin). The System Full flag is the /FF
pin of the last device in the daisy chain, and the Next Free
address resides in the device with /FI LOW and /FF
HIGH. If disabled in the Control register, the /FF output
only depends on the /FI input (/FF = /FI).
/FI (Full Input, Input, TTL)
The /FI input generates a CAM-Memory-System-Full
indication in vertically cascaded systems. It is connected
to the /FF output of the previous device in the daisy chain.
The /FI pin on the first device in a chain must be tied
LOW.
/RESET (Reset, Input, TTL)
/RESET must be driven LOW to place the device in a
known state before operation, which resets the device to
the conditions shown in Table 3 on page 11. The /RESET
pin should be driven by TTL levels, not directly by an RC
timeout. /E must be kept HIGH during /RESET.
VCC, GND (Positive Power Supply, Ground)
These pins are the power supply connections to the MH.
VCC must meet the voltage supply requirements in the
Operating Conditions section relative to the GND pins,
which are at 0 volts (system reference potential), for
correct operation of the device. All the ground and power
pins must be connected to their respective planes with
adequate bulk and high frequency bypassing capacitors in
close proximity to the device.
Rev. 1