hi-3182ps Holt Integrated Circuits, Inc., hi-3182ps Datasheet
hi-3182ps
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hi-3182ps Summary of contents
Page 1
... ESD input protection as well as TTL and CMOS compatibility. The differential outputs of the HI-318X series of products are programmable to either the high speed or low speed ARINC 429 output rise and fall time specifications through the use of two external capacitors. The output voltage swing is also adjustable by the application of an external voltage to the VREF input ...
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... V other than +5V is needed, a separate +5V power supply REF is required for pin With the DATA (A) input at a logic high and DATA (B) input at a logic low, A will switch to the +V OUT REF switch to the -V rail (ARINC HIGH state). With both data ...
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... ANALOG Ref. voltage used to determine output voltage swing. Pin sources current to allow use of a zener reference. REF STROBE INPUT A logic high tri-states the ARINC outputs. Not available in the 14-pin SOIC package (tied to GND internally). SYNC INPUT Synchronizes data inputs DATA (A) INPUT ...
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... Output Voltage High (Output to Ground) Output Voltage Low (Output to Ground) Output Voltage Null Input Capacitance Note 1. Not tested, but characterized at initial device design and after major process and/or design change which affects this parameter. Note 2. Interchangeability of force and sense is acceptable. AC ELECTRICAL CHARACTERISTICS +V = +15V -15V ...
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... PCB (3" X 4.5" X .062"). 2. At 100% duty cycle, 15V power supplies. For 12V power supplies multiply all tabulated values by 0.8. 3. High Speed: Data Rate = 100 Kbps, Load 400 Ohms nF. Data not presented for this is considered unrealistic for high speed operation. ...
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... HI-3182, HI-3183, HI-3184, HI-3185, HI-3186, HI-3188 ADDITIONAL PIN CONFIGURATIONS HI-3182PS, HI-3183PS, HI-3188PS REF GND (See Note * ) - 2 SYNC - 3 DATA( OUT - GND - 8 Notes: * Pin 2 may be left floating ** Thermally Enhanced SOIC package 16 - PIN PLASTIC SMALL OUTLINE (ESOIC)** ...
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... TO +125°C M PACKAGE DESCRIPTION 16 PIN CERAMIC SIDE BRAZED DIP (16C) 32 PIN J-LEAD CERQUAD (32U) not available with ‘M’ flow 28 PIN CERAMIC LEADLESS CHIP CARRIER (LCC) (28S) 16 PIN CERDIP (16D) not available with ‘M’ flow OUTPUT SERIES RESISTANCE FUSE 37.5 Ohms ...
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... BSC (1.27) BSC = “Basic Spacing between Centers” is theoretical true position dimension and has no tolerance. (JEDEC Standard 95) HI-318X PACKAGE DIMENSIONS .0085 ± .001 (.220 ± .029) .100 .153 ± .003 typ (2.54) (3.87 ± .06) See Detail A .055 ± .005 (1.397 ± ...
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... Standard 95) 16-PIN CERAMIC SIDE-BRAZED DIP .125 min (3.175) BSC = “Basic Spacing between Centers” is theoretical true position dimension and has no tolerance. (JEDEC Standard 95) HI-318X PACKAGE DIMENSIONS .0105 ± .0015 (.2667 ± .038) .295 ± .004 .190 (7.49 ± .10) (4.83) See Detail A 0° ...
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... SQ. .173 ±.008 (4.394 ±.203) BSC = “Basic Spacing between Centers” is theoretical true position dimension and has no tolerance. (JEDEC Standard 95) HI-318X PACKAGE DIMENSIONS .050 max .790 max (1.27 max) .288 ±.005 (7.315 ±.125) .100 BSC (2 ...
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... CERAMIC LEADLESS CHIP CARRIER .020 INDEX (.508) PIN 1 .040 x 45° 3PLS (1.016 x 45° 3PLS) BSC = “Basic Spacing between Centers” is theoretical true position dimension and has no tolerance. (JEDEC Standard 95) 32-PIN J-LEAD CERQUAD .040 typ (1.016) .019 ± .003 (.483 ± ...