m368l6423jun Samsung Semiconductor, Inc., m368l6423jun Datasheet - Page 10

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m368l6423jun

Manufacturer Part Number
m368l6423jun
Description
Ddr Sdram Unbuffered Module
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
10.0 AC Operating Conditions
Note :
1. V
2. The value of V
3. These parameters should be tested at the pim on actual components and may be checked at either the pin or the pad in
11.0 Input/Output Capacitance
Input capacitance(A0 ~ A12, BA0 ~ BA1,RAS,CAS,WE )
Input capacitance(CKE0)
Input capacitance( CS0)
Input capacitance( CLK0, CLK1,CLK2)
Input capacitance(DM0~DM7, DM8(for ECC))
Data & DQS input/output capacitance(DQ0~DQ63)
Data input/output capacitance (CB0~CB7)
256MB, 512MB Unbuffered DIMM
Input High (Logic 1) Voltage, DQ, DQS and DM signals
Input Low (Logic 0) Voltage, DQ, DQS and DM signals.
Input Differential Voltage, CK and CK inputs
Input Crossing Point Voltage, CK and CK inputs
simulation. the AC and DC input specificatims are refation to a V
ID
is the magnitude of the difference between the input level on CK and the input on CK.
IX
is expected to equal 0.5*V
Parameter/Condition
Parameter
Output
DDQ
of the transmitting device and must track variations in the DC level of the same.
Output Load Circuit (SSTL_2)
Z0=50Ω
Symbol
C
Cout1
Cout2
CIN1
CIN2
CIN3
CIN4
CIN5
LOAD
REF
10 of 17
envelope that has been bandwidth limited 20MHz.
=30pF
V
TT
Symbol
V
V
V
V
=0.5*V
IH
ID
IL
IX
(AC)
(AC)
(AC)
(AC)
Min
49
42
42
25
6
6
M368L3223JUS
-
R
DDQ
T
=50Ω
0.5*V
V
V
=0.5*V
REF
REF
Min
0.7
DDQ
+ 0.31
DDQ
Max
57
50
50
30
7
7
-
-0.2
(V
DD
Rev. 1.0 November 2007
=2.5V, V
0.5*V
V
V
REF
DDQ
Max
Min
DDQ
65
42
42
28
10
10
DDQ
M368L6423JUN
-
- 0.31
+0.6
+0.2
=2.5V, T
DDR SDRAM
A
Unit
= 25°C, f=1MHz)
Max
81
50
50
34
12
12
V
V
V
V
-
Note
Unit
3
3
1
2
pF
pF
pF
pF
pF
pF
pF

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