mt9v125 aptina, mt9v125 Datasheet - Page 8

• Manufacturer Part Number: mt9v125
• Description: 1/4-inch System-on-a-chip Soc Vga Ntsc And Pal Cmos Digital Image Sensor
• Manufacturer: aptina

Detailed Architecture Overview
Sensor Core
Figure 6:
PDF: 09005aef829db8a0/Source: 09005aef829dbfdb
MT9V125_LDS_2.fm - Rev. A 4/07 EN
Sensor Core Block Diagram
The sensor consists of a pixel array of 695 x 512, an analog readout chain, 10-bit ADC
with programmable gain and black offset, and timing and control, as illustrated in
Figure 6.
There are 649 columns by 498 rows of optically-active pixels that include a pixel bound-
ary around the VGA (640 x 480) image to avoid boundary effects during color interpola-
tion and correction.
The one additional active column and two additional active rows are used to enable hor-
izontally and vertically mirrored readout to start on the same color pixel.
Figure 7 on page 9 illustrates the process of capturing the image. The original scene is
flipped and mirrored by the sensor optics. Sensor readout starts at the lower right hand
corner. The image is presented in true orientation by the output display.
Analog Processing
Sensor (APS)
Active Pixel
Array
Timing and Control
Control Register
MT9V125: 1/4-Inch VGA SOC Digital Image Sensor
ADC
8
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Communication
10-Bit Data
Signals
Clock
to IFP
to IFP
Sync
Bus
Detailed Architecture Overview
©2007 Micron Technology, Inc. All rights reserved.