ppc440grx Applied Micro Circuits Corporation (AMCC), ppc440grx Datasheet - Page 60

• Manufacturer Part Number: ppc440grx
• Description: Powerpc 440grx Embedded Processor
• Manufacturer: Applied Micro Circuits Corporation (AMCC)

440GRx – PPC440GRx Embedded Processor
Table 9. Signal Functional Description (Sheet 4 of 8)
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3kΩ to OV
3. Must pull down (recommended value is 1kΩ)
4. If not used, must pull up (recommended value is 3kΩ to OV
5. If not used, must pull down (recommended value is 1kΩ)
6. Strapping input during reset; pull-up or pull-down required
60
External Slave Peripheral Interface
DMAAck0:3
DMAReq0
DMAReq1
DMAReq2:3
EOT0:3/TC0:3
PerAddr02:07
PerAddr08:31
PerData00:31
PerDataPar0:3
PerBLast
PerCS0
PerCS1:5
PerOE
PerReady
PerR/W
PerWBE0:3
PerErr
Signal Name
End Of Transfer/Terminal Count.
Used by the PPC440GRx to indicate that data transfers have
occurred.
Used by slave peripherals to indicate they are prepared to
transfer data.
Used by slave peripherals to indicate they are prepared to
transfer data.
Used by slave peripherals to indicate they are prepared to
transfer data.
Peripheral address bus used by the PPC440GRx when not in
external master mode; otherwise, used by external master.
Peripheral address bus used by the PPC440GRx when not in
external master mode; otherwise, used by external master.
Peripheral data bus used by the PPC440GRx when not in
external master mode; otherwise, used by external master.
Note: PerData00 is the most significant bit (msb) on this bus.
Peripheral data bus parity used by the PPC440GRx when not
in external master mode; otherwise, used by external master.
Used by either the peripheral controller, DMA controller, or
external master to indicates the last transfer of a memory
access.
External peripheral device select.
External peripheral device select.
Used by either peripheral controller or DMA controller
depending upon the type of transfer involved. When the
PPC440GRx is the bus master, it enables the selected device
to drive the bus.
Used by a peripheral slave to indicate it is ready to transfer
data.
Used by the PPC440GRx when not in external master mode,
as output by either the peripheral controller or DMA controller
depending upon the type of transfer involved. High indicates a
read from memory, low indicates a write to memory.
Otherwise, it is used by the external master as an input to
indicate the direction of transfer.
External peripheral data bus byte enables.
External Error. Used as an input to record external slave
peripheral errors.
DD
(EOV
Description
DD
DD
for Ethernet)
(EOV
DD
for Ethernet)
Preliminary Data Sheet
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
I
I
I
I
I
Revision 1.11 – July 22, 2008
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3VLVTTL
3.3VLVTTL
Type
AMCC Proprietary
Notes
1, 5
1, 2
1, 4
1, 2
1, 2
1, 2
1, 2
1
1
1
1
2
1
1