ppc440grx Applied Micro Circuits Corporation (AMCC), ppc440grx Datasheet - Page 88

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ppc440grx

Manufacturer Part Number
ppc440grx
Description
Powerpc 440grx Embedded Processor
Manufacturer
Applied Micro Circuits Corporation (AMCC)
Datasheet
440GRx – PPC440GRx Embedded Processor
Revision Log
88
04/11/2006
04/24/2006
05/30/2006
11/02/2006
12/28/2006
01/10/2007
07/25/2007
10/15/2007
01/07/2008
Date
Version
1.01
1.02
1.03
1.04
1.05
1.06
1.07
1.08
1.09
Initial creation of document.
Correct security designation.
Add new/updated power and current values.
Correct list containing balls by ball number.
Update power and temperature data.
Add clocking information.
Update EEPROM.
Change and delete incorrect MemClkEn references
Correct enable/disable specifications for PCI Gnt/Req signals.
Change analog voltage filter circuit inductor Part number.
Correct I/O designation for some Ethernet signals.
Remove leaded PNs.
Correct descriptions of LeakTest, RcvrInh, ModeCtrl, RefEn, and DrvrInh1:2 signals.
Add information concerning address bus loading on DDR SDRAMs.
Restore leaded PNs.
Update DDR2/1 SDRAM timing and board design data.
Added more information to the Thermal Monitor section. Changes to Figure 3.
Added assembly recommendations, Tables 3 and 4.
Added recommendations for Unused I/O.
Updated signal description in table 9for signals SPCClkOUT, SCPDI, SCPDO, LeakTest and
LeakTest2.
Updated Table 21 to include reference clocks.
Removed all references to TBI and RTBI as these modes are not supported due to errata:
Chip_4 and Chip_5.
Added voltage reference to Figures 5, 6 and 7
Corrected I/O comments for UART and Ethernet signals in Table 9.
Removed Note 2 from Table 10and added section on Analog Voltage Filter
Added Figure 4 and Table 13 for Overshoot and Undershoot.
Added section on Power Sequencing.
Added slew rate and jitter requirements for GMCRefClk in Table 20.
Added note in Strapping section
Changed GPIO26[IIC0SData] to [GPIO26]IIC0SData in Table 9.
Added figures 8 and 9 showing setup, hold, output valid and output hold timing for RGMII signals.
Corrected PVR number
Corrected phone numbers on last page
Corrected RGMII timing relative to GMCnTXClk in Table 21.
Pull up recommendations to Table 9 for PCI signals.
Correction to table 20 “GMCRefClk Period” unit column, changed MHz to ns
Correction to table 19 “GMCRefClk Period” unit column, changed MHz to ns.
Corrected DC Overshoot in Overshoot.
Added note for SMIISync signal to I/O Specification table.
Added timing references to I/O Specification tables.
Added an unused termination recommendation for Ethernet interfaces.
Added TrcClk supported range to Clock Specification table.
Removed tape and reel as a shipping option.
Updated power numbers in Tables 14, 15, 16 and 17.
Corrected GMCTxClk entry in Table 9 to indicate that it is an input.
Contents of Modification
Preliminary Data Sheet
Revision 1.11 – July 22, 2008
AMCC Proprietary

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