hdd16m72d9w ETC-unknow, hdd16m72d9w Datasheet - Page 5

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hdd16m72d9w

Manufacturer Part Number
hdd16m72d9w
Description
Sdram Module 128mbyte 16mx72bit , Based 16mx8, 4banks Ref., 184pin-dimm With Unbuffered
Manufacturer
ETC-unknow
Datasheet
HANBit
ABSOLUTE MAXIMUM RATINGS
Notes:
POWER & DC OPERATING CONDITIONS
(Recommended operating conditions (Voltage referenced to Vss = 0V, T
Notes
bandwidth limited to 20MHz. The DRAM must accommodate DRAM current spikes on
TO
2. V
V
3. V
4. These parameters should be tested at the pin on actual components and may be checked at either the pin or the pad in
simulation. The AC and DC input specifications are relative to a
5. The value of V
6. These charactericteristics obey the SSTL-2 class II standards.
URL : www.hbe.co.kr
REV 1.0 (November.2002)
1. Includes
Voltage on any pin relative to Vss
Voltage on V
Voltage on V
Storage temperature
Power dissipation
Short circuit current
REF
Supply Voltage
I/O Supply Voltage
I/O Reference Voltage
I/O Termination Voltage(system)
Input High Voltage
Input Low Voltage
Input Voltage Level, CK and /CK inputs
Input Differential Voltage, CK and /CK inputs
Input leakage current
Output leakage current
Output High current (V
Output Low current (V
Output High Current(Half strengh driver)
Output High Current(Half strengh driver)
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
V
TT
ID
, and must track variations in the DC le vel of
REF
is the magnitude of the difference between the input level on CK and the input level on CK.
is not applied directly to the device. V
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
, both of which may result in
25mV margin for DC offset on
DD
DDQ
IX
supply relative to Vss
is expected to equal 0.5*V
PARAMETER
PARAMETER
supply relative to Vss
OUT
OUT
= 0.35V)
= 1.95V)
V
REF
noise.
TT
V
DDQ
REF
is a system supply for signal termination resistors, is expected to be set equal to
of the transmitting device and must track variations in the dc level of the same.
V
V
, and a combined total of
REF
REF
should be de-coupled with an inductance of £ 3nH.
SYMBOL
SYMBOL
V
V
V
V
V
IH
V
IN
IN
ID
V
IL
T
V
V
V
V
I
I
, V
DDQ
I
I
P
I
I
(DC)
I
DDQ
STG
OS
REF
(DC)
(DC)
(DC)
OH
OL
OZ
OH
OL
V
DD
DD
TT
LI
D
REF
OUT
envelop that has been bandwidth limited to 200MHZ.
5
V
V
V
50mV margin for all AC noise and DC offset on
DDQ
REF
REF
-16.8
16.8
MIN
-0.3
-0.3
2.3
2.3
/2-50mV
0.3
-2
-5
-9
– 0.04
+ 0.15
9
V
REF
A
= 0 to 70° C) )
and internal DRAM noise coupled
-55 ~ +150
V
-0.5 ~ 3.6
-1.0 ~ 3.6
-0.5 ~ 3.6
V
V
RATING
V
V
V
DDQ
REF
REF
DDQ
DDQ
REF
13.5
MAX
50
/2+50mV
2.7
2.7
+ 0.04
2
5
- 0.15
+ 0.3
+ 0.3
+ 0.6
HDD16M72D9W
HANBit Electronics Co.,Ltd.
UNIT
mA
mA
mA
mA
uA
uA
V
V
V
V
V
V
V
V
V
REF
NOTE
UNTE
,
mA
° C
W
V
V
V
1
2
3

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