tmxf84622 ETC-unknow, tmxf84622 Datasheet - Page 33

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tmxf84622

Manufacturer Part Number
tmxf84622
Description
Tmxf84622 Mbits/s/622 Mbits/s Interface Sonet/sdh X84/x63 Ultramapper
Manufacturer
ETC-unknow
Datasheet
Advance Data Sheet, Rev. 2
July 2001
3 Pin Information
Table 1. Pin Descriptions (continued)
* O
† Transmit path convention is toward the high-speed fiber output. Note that LINERX signals are labeled Receive, as seen from the cross con-
Agere Systems Inc.
Note: Pin functional descriptions are representative configurations. Configuration is limited by the I/O definition
E6, B4, C5, C6,
A3, F8, B5, A4,
A16, C17, B18,
E8, A5, F9, A6,
C11, B11, C12,
E17, B17, C18,
E12, A10, F13,
A11, F14, E14,
C14, F15, E15,
C15, B15, F17,
B12, A12, B13,
A13, B14, A14,
F16, A15, B16,
I/O
I
I
nect perspective.
B9, E11, B10,
D
U
C8, F11, C9,
F10, B8, A7,
A8, F12, A9,
B6, B7, E9,
1
; I/O
indicates internal pull-up.
2
E18, B19
indicates external pull-up recommended (unused or system required),
indicates external pull-down recommended (unused or system required),
D
A19
Pin
and the flexibility of the internal cross-connect.
indicate internal pull-down,
LINERXDATA[30:1]
LINERXCLK[30:1]
(continued)
Symbol
LINE Transmit Path Direction (60)
Multifunction System Interface
Type I/O*
I/O
I
D
D
Configurable Inputs to the Internal Cross Connect.
Transport Modes:
Framer—LIU: Received positive-rail or single-rail DS1/E1
line data input (sourced from an external LIU).
M12 or E12: Normally used as receive DS1/E1 data input. If
DS1/E1’s come from internal source, these pins may also be
used as DS2/E2 inputs.
VT Mapper: Receive DS1/E1/VC data input.
M23 or E23: Receive DS2/E2 data input. Up to 21 DS2/12
E2 signals may be assigned to any of the 30 LINERXDATA
inputs.
Configurable Inputs to the Internal Cross Connect.
Transport Modes:
Framer—LIU: Receive DS1/E1 line clock input
M12 or E12: Normally used as receive DS1/E1 line clock
input (unless for demand clocking mode in which they are
used as clock outputs). If DS1/E1 signals come from internal
source, these pins may carry DS2/E2 clk input.
VT Mapper: Receive DS1/E1/VC line clock input
M23 or E23: Receive DS2/E2 clock input/output. Up to
21 DS2/12 E2 signals may be assigned to any of the 30 LIN-
ERXCLK inputs.
TMXF84622 155 Mbits/s/622 Mbits/s Interface
SONET/SDH x84/x63 Ultramapper
Description
33

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