tmxf84622 ETC-unknow, tmxf84622 Datasheet - Page 36

• Manufacturer Part Number: tmxf84622
• Description: Tmxf84622 Mbits/s/622 Mbits/s Interface Sonet/sdh X84/x63 Ultramapper
• Manufacturer: ETC-unknow

TMXF84622 155 Mbits/s/622 Mbits/s Interface
SONET/SDH x84/x63 Ultramapper
3 Pin Information
Table 1. Pin Descriptions (continued)
* O
† Receive path convention is away from the high-speed fiber output. Note that CHITX signals are labeled Transmit, as seen from the cross con-
36
36
AF34, AE33,
AF33, AF32,
AE29, AJ34,
AF30, AF29,
AK34, AJ33,
AJ30, AJ29,
AN31, AJ27
AA33, Y29,
I/O
I
nect perspective.
D
1
; I/O
2
AD34,
AD33,
AD32,
AD30,
AG34,
AH34,
AD29,
AG33,
AG32,
AH33,
AG30,
AM34,
AB34,
AA32,
AB33,
AA30,
AC34,
AA29,
AC33,
AC32,
AB29,
AE34,
AC30,
AC29,
AK29,
AP32,
indicates external pull-up recommended (unused or system required),
AA34
Y30
indicates external pull-down recommended (unused or system required),
Pin
D
indicate internal pull-down, I
CHITXDATA[42:1]
CHITXGCLK
CHITXGFS
Symbol
(continued)
CHI Receive Path Direction (44 total, last 2 not indexed)
U
indicates internal pull-up.
Multifunction System Interface (continued)
Type I/O*
—
—
—
I/O Configurable Outputs from the Internal Cross Connect.
I
I
Switching modes:
CHI: Transmit system data or data and signaling output
(2.048 Mbits/s, 4.096 Mbits/s, 8.192 Mbits/s, or 16.384 Mbits/s).
Parallel system bus:
CHITXDATA[16:1]: Transmit system data bus output is restricted
to the first 16 outputs (19.44 Mbits/s). MSB—
CHITXDATA[16] through LSB to CHITXDATA[1].
CHITXDATA[42:17]: Not used in PSB mode only.
Transport modes:
Framer—LIU: Transmit negative-rail DS1/E1 line data output or
8 K frame sync output.
VT mapper: 8 K sync output for DS1/E1 or 2 K sync output for VC.
M12:
CHITXDATA [7:1]: Carry DS2 data output from the M12 MUX.
CHITXDATA [14:8]: Carry DS2 clock input/output of the M12 MUX.
CHITXDATA [21:15]: Carry DS2 data input to the M12 deMUX.
CHITXDATA [28:22]: Carry DS2 clock input to the M12 deMUX.
CHI: Transmit system frame sync input.
Parallel system bus: Transmit system frame sync input.
Switching Modes: CHI: Transmit global system clock input
(4.096 MHz, 8.192 MHz, or 16.384 MHz).
Parallel system bus: Transmit global clock input (19.44 MHz).
Description
Advance Data Sheet, Rev. 2
†
Agere Systems Inc.
July 2001