rfw102 ETC-unknow, rfw102 Datasheet - Page 14

• Manufacturer Part Number: rfw102
• Description: Rfw102 Transceiver Chipset Shortrang
• Manufacturer: ETC-unknow

Datasheet
October 2002
Rev. 1.03
Determining the Values of the External Capacitor (C1 Connected to pin 17)
The time constant of the slow peak detector is determined by an external capacitor that is connected
between pin 13 of the RFIC and GND.
The slow peak detector is the reference signal source for the decision stage. Since the system supports
various transmitting/receiving rates, the reference signal time constant is externally controlled. The time
constant can be set as an internal current source that discharges the external capacitor.
The capacitor is being charged by an internal current source, charging it to the voltage, which is the output
of the peak detector. The fastest charging time is usually related to high power signals at the output of the
SAW correlator. The peak charging current is 10mA.
An internal current source is constantly discharging the capacitor with a current of Icc= 0.2µA.
In order to determine the optimal value of the capacitor, one needs to consider the maximum and minimum
spaces between two consecutive pulses, and the amount of faulty pulses that can be tolerated when the link
is being set up.
Example1: High bit rate system
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•
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1. Since only one faulty pulse can be tolerated, the capacitor must be charged to its fullest voltage with the
1
82[dB]*α[mV/dB]=82[dB]*10[mV/dB]=820[mV] within 0.5µs.
Charging current is 10mA, so the maximum allowed capacitor is:
2. Since the maximum time between two consecutive pulses is 100µs, we need to keep the capacitor from
discharging for at least 100µs. The discharging current is 0.2µAmps, and the allowed voltage to be
discharged is V=1[dB]*α[mV/dB]=10mV.
The minimum capacitor allowed is:
Example2: Low bit rate system
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•
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1. Since only three faulty pulses can be tolerated, the capacitor must be charged to its fullest voltage with
the 3
82[dB]*α[mV/dB]=82[dB]*10[mV/dB]=820[mV] within 3µs, which is the equivalent of 3 1µs pulses.
Charging current is 10mA, so ignoring the intermediate discharge the maximum allowed capacitor is:
2. Since the maximum time between two consecutive pulses is 500µs it is required to keep the capacitor
from discharging for at least 500µs. The discharging current is 0.2µAmps, and the allowed voltage to be
discharged is V=1[dB]*α[mV/dB]=10mV.
The minimum capacitor allowed is:
Decision Stage
The decision stage is the final one in the receiving link. It is the stage where the final signal processing is
done. Its output is a digital pulse, that indicates whether a valid signal has been identified or not. It consists
of an analog comparison stage followed by a simple state machine.
© 2002, RFWaves LTD.
st
pulse. Assume 82dB above noise pulse, the capacitor must be charged to
Minimum time between consecutive pulses: 1µs.
Maximum time between consecutive pulses: 100µs.
Number of faulty pulses to be tolerated: 1
Minimum time between consecutive pulses: 20µs.
Maximum time between consecutive pulses: 500µs.
Number of faulty pulses to be tolerated: 3
rd
pulse. Assume 82dB above noise pulse, the capacitor must be charged to
Conclusion: a capacitor of 10-36nF will be suitable for the requirements defined above.
Conclusion: a capacitor of 2-6nF will be suitable for the requirements defined above.
Notice: In some extreme requirements a capacitor value may not be found.
C
C
C
C
min
max
max
min
=I*t/V=0.2[µA]*500[µs]/10[mV]=10[nF]
=I*t/V=10[mA]*0.5[µs]/820[mV]=6[nF]
=I*t/V=0.2[µA]*100[µs]/10[mV]=2[nF]
=I*t/V=10[mA]*3[µs]/820[mV]=36[nF]
RFW102 ISM Transceiver Chipset
14