rfw102 ETC-unknow, rfw102 Datasheet - Page 15

• Manufacturer Part Number: rfw102
• Description: Rfw102 Transceiver Chipset Shortrang
• Manufacturer: ETC-unknow

Datasheet
October 2002
Rev. 1.03
A voltage offset equivalent to 6dB is subtracted from the output of the slow peak detector. This is considered
an optimal threshold for ASK receivers under Gaussian white noise environment.
The first stage of the decision is an analog voltage comparator that compares the outputs of the two peak
detectors. The output of the fast peak detector is connected to the positive (non-inverting) input and the
output of slow peak detector (after a 6dB subtraction) is connected to the negative (inverting) input.
Following the comparator is a digital one-shot stage, intended for shaping the digital output pulse.
State Machine
The state machine is the digital part of the chip. It performs all the timing, control and digital processing of
the chip.
The input signals are:
The output signals are:
© 2002, RFWaves LTD.
from slow peak detetor
from fast peak detector
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DATA I/O – this is a high impedance input pin in the transmitting mode.
Tx/Rx – ‘H’ = Tx, ‘L’ = Rx.
ACT – ‘LH’ = device is shut down, current consumption minimal, ‘HL’ = device activated.
Clk (internal 488MHz signal from the oscillator).
Comp Out (internal signal from the analog comparator).
DATA I/O – this is a low impedance output pin in the receiving mode.
Pulse (internal signal to the pulse generator) – positive logic signal.
SW cont. (internal signal to the pulse generator) – ‘H’ enables voltage to pulse generator output
amplifier.
SW cont. (internal signal to the pulse generator) – ‘H’ enables voltage to pulse generator output
amplifier.
Acont (internal signal to control the power amplifier) – ‘H’ enables voltage to output power amplifier.
Rxcont (internal signal to control the receiving link) – ‘H’ activates the receiving link. Rxcont ≡ not
(Tx/Rx).
Vi
V
offset
+
+
V=6*alpha
-
Figure 14: Decision Stage Block Diagram
Vref=Vi-V
offset
+
-
Comparator
Analog
RFW102 ISM Transceiver Chipset
Comp. Out
Digital state machine
Retriggerable
One Shot
Non
15
DATA Out