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Am29PL320D Data Sheet July 2003 The following document specifies Spansion memory products that are now offered by both Advanced Micro Devices and Fujitsu. Although the document is marked with the name of the company that orig- inally developed the specification, ...
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Am29PL320D 32 Megabit ( 16-Bit 32-Bit) CMOS 3.0 Volt-only High Performance Page Mode Flash Memory DISTINCTIVE CHARACTERISTICS ARCHITECTURAL ADVANTAGES 32 Mbit Page Mode device — Word (16-bit) or double word (32-bit) mode selectable via WORD# input ...
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GENERAL DESCRIPTION The Am29PL320D Mbit, 3.0 Volt-only page mode Flash memory device organized as 2,097,152 words or 1,048,576 double words. The device is of- fered in an 84-ball FBGA package. The word-wide data (x16) appears on DQ15–DQ0; ...
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TABLE OF CONTENTS Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 5 Block Diagram . . . . . . . . . . ...
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Revision B (June 12, 2001) .................................................... 47 Revision B+1 (August 30, 2001) ............................................. 47 Revision C (October 22, 2002) ............................................... 47 4 Revision C+1 (July 21, 2003) ................................................. 47 Revision C+2 (October 2, 2003) ............................................. 47 Am29PL320D October 2, 2003 ...
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PRODUCT SELECTOR GUIDE Family Part Number Regulated Voltage Range: V Speed Option Full Voltage Range: V Max access time ACC Max CE# access time Max page access time PACC Max ...
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CONNECTION DIAGRAMS B9 C9 DQ30 CE# V DQ15 WORD ACC WP ...
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INPUT CONFIGURATION A19– address inputs DQ30–DQ0 = 31 data inputs/outputs DQ31/A double word mode, functions as DQ31. In word mode, functions as A-1 (LSB address input) WORD# = Word enable input When low, enables word mode ...
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... SPEED OPTION See Product Selector Guide and Valid Combinations BOOT CODE SECTOR ARCHITECTURE T = Top Boot Sector B = Bottom Boot Sector Package Marking P320DT60RI, P320DB60RI P320DT70RI, P320DB70RI WPI P320DT70VI, P320DB70VI P320DT90VI, P320DB90VI Valid Combinations Am29PL320D ° C) Voltage Range V = 3.0–3 2.7–3 October 2, 2003 ...
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DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register it- self does not occupy any addressable memor y location. The register is composed ...
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Page Mode Read The Am29PL320D is capable of fast page mode read and is compatible with the page mode Mask ROM read operation. This mode provides faster read access speed for random locations within a page. The page size of ...
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Writing Commands/Command Sequences To write a command or command sequence (which in- cludes programming data to the device and erasing sectors of memory), the system must drive WE# and CE and OE ...
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Table 4. Sector Address Table, Top Boot (Am29PL320DT) Sector A19 A18 A17 A16 A15 A14 A13 A12 SA0 SA1 SA2 SA3 SA4 0 1 ...
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Table 6. Sector Address Table, Bottom Boot (Am29PL320DB) Sector A19 A18 A17 A16 SA0 SA1 SA2 SA3 SA4 SA5 0 ...
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Autoselect Mode The autoselect mode provides manufacturer and de- vice identification, and sector protection verification, through identifier codes output on DQ7–DQ0. This mode is primarily intended for programming equipment to automatically match a device to be programmed with its corresponding ...
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COMMON FLASH MEMORY INTERFACE (CFI) The Common Flash Interface (CFI) specification out- lines device and host system software interrogation handshake, which allows specific vendor-specified software algorithms to be used for entire families of de ...
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Addresses (Double Word Addresses Mode) (Word Mode) 1Bh 36h 1Ch 38h 1Dh 3Ah 1Eh 3Ch 1Fh 3Eh 20h 40h 21h 42h 22h 44h 23h 46h 24h 48h 25h 4Ah 26h 4Ch Addresses (Double Word Addresses Mode) (Word Mode) 27h 4Eh ...
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Table 12. Primary Vendor-Specific Extended Query Addresses (Double Word Addresses Mode) (Word Mode) 40h 80h 41h 82h 42h 84h 43h 86h 44h 88h 45h 8Ah 46h 8Ch 47h 8Eh 48h 90h 49h 92h 4Ah 94h 4Bh 96h 4Ch 98h 4Dh ...
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SecSi¥ (Secured Silicon) Sector Flash Memory Region The SecSi (Secured Silicon) Sector feature provides a Flash memory region that enables permanent part identification through an Electronic Serial Number (ESN). The SecSi Sector is a minimum of 128 words (64 double ...
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START If data = 00h, RESET# = SecSi Sector unprotected. If data = 01h, SecSi Sector is Wait 1 µs protected. Write 60h to any address Remove V from RESET# Write 40h to SecSi ...
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Erase Suspend mode, the system may once again read array data with the same exception. See “Erase Suspend/Erase Resume Commands” for more infor- mation on this mode. The system must issue the reset command to re-en- able the device for ...
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Unlock Bypass Command Sequence The unlock bypass feature allows the system to pro- gram bytes or words to the device faster than using the standard program command sequence. The unlock by- pass command sequence is initiated by first writing two ...
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Chip Erase Command Sequence Chip erase is a six bus cycle operation. The chip erase command sequence is initiated by writing two unlock cycles, followed by a set-up command. Two additional unlock write cycles are then followed by the chip ...
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Note that unlock bypass programming is not allowed when the device is erase-suspended. Reading at any address within erase-suspended sec- tors produces status data on DQ7–DQ0. The system can use DQ7, or DQ6 and ...
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Temporary Sector Unprotect Enable/Dis- able Command Sequence The temporary unprotect command sequence is a four-bus-cycle operation. The sequence is initiated by writing two unlock write cycles. A third write cycle sets up the command. The fourth and final write cycle ...
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Command Definitions Table 13. Command Definitions (Double Word Mode) Command Sequence First (Note 1) Addr Read (Note Reset (Note 7) 1 XXX Manufacturer ID 4 555 Device ID (Note 9) 6 555 SecSi¥ Sector Factory 4 555 ...
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Table 14. Command Definitions (Word Mode) Command Sequence (Note 1) Addr Data Read (Note Reset (Note 7) 1 XXX Manufacturer ID 4 AAA Device ID (Note 9) 6 AAA SecSi¥ Sector Factory 4 AAA Protect (Note 10) ...
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WRITE OPERATION STATUS The device provides several bits to determine the sta- tus of a write operation: DQ2, DQ3, DQ5, DQ6, and DQ7. Table 15 and the following subsections describe the functions of these bits. DQ7 and DQ6 each offer ...
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DQ6: Toggle Bit Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or complete, or whether the device has entered the Erase Suspend mode. Toggle Bit I may be read at any address, ...
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START Read DQ7–DQ0 Read DQ7–DQ0 (Note 1) No Toggle Bit = Toggle? Yes No DQ5 = 1? Yes Read DQ7–DQ0 (Notes Twice 1, 2) Toggle Bit No = Toggle? Yes Program/Erase Operation Not Complete, Write Operation Complete Reset Command Notes: ...
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Operation Embedded Program Algorithm Standard Mode Embedded Erase Algorithm Reading within Erase Suspended Sector Erase Suspend Reading within Non-Erase Mode Suspended Sector Erase-Suspend-Program Notes: 1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the ...
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ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . . . -65°C to +150°C Ambient Temperature with Power Applied ...
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DC CHARACTERISTICS CMOS Compatible Parameter Symbol Description I Input Load Current Input Load Current LIT I Output Leakage Current LO V Active Inter-Page Read CC I CC1 Current (Notes Active Write Current CC I ...
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DC CHARACTERISTICS (Continued) Zero Power Flash 500 Note: Addresses are switching at 1 MHz. Figure 9. I Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 ...
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TEST CONDITIONS Device Under Test C L 6.2 kΩ Note: Diodes are IN3064 or equivalent Figure 11. Test Setup KEY TO SWITCHING WAVEFORMS WAVEFORM Don’t Care, Any Change Permitted 3.0 V 1.5 V Input 0.0 V Figure 12. Input Waveforms ...
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AC CHARACTERISTICS Read Operations Parameter JEDEC Std Description t t Read Cycle Time AVAV Address Access Time AVQV ACC t t Chip Enable to Output Delay ELQV CE t Page Access Time PACC t t Output Enable ...
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AC CHARACTERISTICS Addresses CE# OE# WE# Outputs 0 V Figure 13. Conventional Read Operations Timings A19-A3 A2-A-1 Data Bus CE# Note: Double Word Configuration: Toggle A2, A1, A0. Word Configuration: Toggle A2, A1, A0, A- Addresses Stable ...
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AC CHARACTERISTICS Double Word/Word Configuration (WORD#) Parameter JEDEC Std Description t t CE# to WORD# Switching Low or High ELFL/ ELFH t WORD# Switching Low to Output HIGH Z FLQZ t WORD# Switching High to Output Active FHQV CE# OE# ...
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AC CHARACTERISTICS Program/Erase Operations Parameter JEDEC Std Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time WLAX Data Setup Time DVWH ...
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AC CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555h CE# t GHWL OE# WE Data t VCS V CC Notes program address program data Illustration shows device in ...
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AC CHARACTERISTICS Erase Command Sequence (last two cycles Addresses 2AAh CE# t GHWL OE WE Data t VCS V CC Notes sector address (for Sector Erase Valid Address ...
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AC CHARACTERISTICS t RC Addresses VA t ACC OE# t OEH WE# High Z DQ6/DQ2 Note Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, ...
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AC CHARACTERISTICS Alternate CE# Controlled Erase/Program Operations Parameter JEDEC Std Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVEL Address Hold Time ELAX Data Setup Time DVEH ...
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AC CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE Data Notes program address program data, DQ7# = complement of the data written to the device, D ...
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ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time, 96 and 128 KByte sector Sector Erase Time, 8 and 16 KByte sector Chip Erase Time Word Programming Time Double Word Programming Time Word Mode Chip Programming Time Double Word (Note 3) ...
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BGA PACKAGE CAPACITANCE Parameter Symbol Parameter Description C Input Capacitance IN C Output Capacitance OUT C Control Pin Capacitance IN2 Notes: 1. Sampled, not 100% tested. 2. Test conditions T = 25° 1.0 MHz. A October 2, 2003 ...
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PHYSICAL DIMENSIONS FBF084—84-Ball Fine Pitch Ball Grid Array (FBGA Dwg. Rev. AB-01; 7/00 Am29PL320D October 2, 2003 ...
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REVISION SUMMARY Revision A (March 7, 2001) Initial release. Revision B (June 12, 2001) Global Added 70R speed option. Changed data sheet status from Advance Information to Preliminary. Distinctive Characteristics SecSi Sector: Added note to future compatibility. Power Consumption: Replaced ...
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Sales Offices and Representatives North America ALABAMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...