IDT72V3656 IDT [Integrated Device Technology], IDT72V3656 Datasheet - Page 8

• Manufacturer Part Number: IDT72V3656
• Description: 3.3 VOLT CMOS TRIPLE BUS SyncFIFOTM WITH BUS-MATCHING
• Manufacturer: IDT [Integrated Device Technology]

DETERMINING ACTIVE CURRENT CONSUMPTION AND POWER DISSIPATION
CLKB and CLKC set to f
disconnected to normalize the graph to a zero capacitance load. Once the capacitance load per data-output channel and the number of these device's inputs
driven by TTL HIGH levels are known, the power dissipation can be calculated with the equation below.
CALCULATING POWER DISSIPATION
IDT72V3656/72V3666/72V3676 3.3V CMOS TRIPLE BUS SyncFIFO
WITH BUS MATCHING 2,048 x 36 x 2, 4,096 x 36 x 2 and 8,192 x 36 x 2
The I
With I
100
50
70
40
80
60
30
20
90
10
0
CC(f)
P
where:
N = number of used outputs (36-bit (long word), 18-bit (word) or 9-bit (byte) bus size)
C
f
o
CC(f)
0
T
L
= V
current for the graph in Figure 1 was taken while simultaneously reading and writing a FIFO on the IDT72V3656/72V3666/72V3676 with CLKA,
= output capacitance load
= switching frequency of an output
taken from Figure 1, the maximum power dissipation (P
CC
x I
CC
10
S
. All data inputs and data outputs change state during each clock cycle to consume the highest supply current. Data outputs were
(f) + Σ(C
f
T
C
data
A
L
= 25°C
= 0 pF
= 1/2 f
N
Figure 1. Typical Characteristics: Supply Current (I
L
S
x V
20
CC
2
x f
o
)
30
V
f
S
CC =
40

Clock Frequency
3.3V
T
) of these FIFOs may be calculated by:
8
50
TM

MHz
CC
60
) vs. Clock Frequency (f
70
COMMERCIAL TEMPERATURE RANGE
V
CC =
S
)
3.6V
80
V
CC =
3.0V
90
4665 drw02a
100