cxa1166k Sony Electronics, cxa1166k Datasheet
cxa1166k
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cxa1166k Summary of contents
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... ECL 100K/10KH/10K. This IC is pin-compatible with the conventional CXA1076AK/CXA1176K/CXA1176AK, replace the conventional models easily. Compared with the conventional models, the CXA1166K has a greatly improved performance because of the new circuit design and carefully considered layout. Features • Differential linearity error: ±0.5 LSB or less • ...
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... IOR IOR – –65 to +150 Min. Typ. –5.5 –5.2 EE – DV –0. –0.05 0 –0.1 0 –2.2 –2 –20 – 2 – CXA1166K °C Max. Unit –4.95 V 0.05 V 0.05 V 0.1 V –1 100 °C ...
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... LINV – 3 – CXA1166K (MSB ...
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... CLK – 4 – CXA1166K Description Polarity selection other than MSB and overrange. (Refer to the table of input voltage vs. Digital output) Low level is maintained with left open. Polarity selection for MSB (Refer to the table of input voltage vs. Digital output) Low level is maintained with left open ...
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... Digital ground Digital ground for output AV EE drive No connected recommended to connect these pins to AGND. No connected recommended to connect these pins to DGND. – 5 – CXA1166K Description Output Complementary 1 6 output (resistance (resistance ...
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... Input = 62.499MHz Clock = 250MHz Input = 49.999MHz Error > 16LSB Clock = 200MHz Input = 62.499MHz Error > 16LSB Clock = 250MHz DG NTSC 40IRE mod ramp 250MSPS – 6 – CXA1166K = 0V –2V 25°C) RTS RB RBS Min. Typ. Max. Unit 8 bits LSB ±0.5 ±0.5 LSB ...
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... V = –2V RB RBS Tpw0 80% N – 1 20% Tr – 7 – CXA1166K …… …… …… …… …… … ...
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... CLK When the distribution of the output codes is the maximum slew rate point is sampled with the clock signal having the same frequency as that of the analog input signal, Aperture jitter (Taj) is defined as follows: Taj = / t – 8 – CXA1166K 0V –1V –2V 129 (LSB) 128 t 127 ...
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... Analog Input Bias Current Measurement Circuit – 5. ECL Latch B ECL + Latch DATA 16 1⁄ ECL DUT Latch CXA1166K CLK CLK Decimator CXA1166K – 9 – CXA1166K Comparator Pulse A<B Counter (CX20202A – 1) 10bit D⁄A Vector Scope – 1V – 2V ...
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... Notes on Operation • The CXA1166K is an ultra-high speed A/D converter featuring ECL level of input/output for the logic block. In order to derive the most from its high-speed performance, the characteristic impedance should be matched properly. • The outputs are designed to drive a load terminated to – excellent transmission characteristic can be yielded by designing the printed circuit board with a 50 characteristic impedance ...
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... IC Application” in Sony’s Data book. • Sony’s SPECL series is used as the logic ICs in the Application Circuit to investigate the maximum performance of the CXA1166K. For normal applications, lower speed logic ICs can be used according to the applied frequency. ...
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... V — Input voltage [ 3.0 – 2 200 100 0 –2.0 0 – 0.5 – 12 – CXA1166K V pin input capacitance vs. IN Voltage characteristics –1.5 –1 –0 — Input voltage [ pin input current vs. IN Voltage characteristics – – – 0 1.5 1.0 0.5 V — Input voltage [V] ...
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... Resistor string current vs. Temperature characteristics –12 –14 –16 –18 –20 –22 –24 – — Case temperature [°C] CLK open voltage vs. Temperature characteristics –1.25 –1.3 –1.35 –1.4 –1.45 – — Case temperature [°C] – 13 – 50 100 150 50 100 150 50 100 150 CXA1166K ...
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... Tc — Case temperature [°C] V vs. Temperature characteristics OL –1.7 –1.8 –1.9 –2.0 –2.1 – — Case temperature [°C] SNR vs. Input frequency response characteristics Input frequency [MHz] – 14 – CXA1166K 100 150 100 150 100 ...
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... Input frequency [MHz] Maximum conversion rate vs. Temperature characteristics 300 250 200 Error rate = 10 –8 TPS Input frequency = CLK frequency/4 – 1kHz 16LSB or more error 150 25 25 – Ta — Ambient temperature [°C] – 15 – Clock frequency : 250MHz 100 1000 75 125 CXA1166K ...
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... Error rate vs. Clock duty cycle 10 – – 8 Input frequency = 125MHz, full-scale Clock frequency = 250MHz 16LSB or more error 10 – CLK duty cycle [%] 50 100 Tc — Case temperature [°C] – 16 – CXA1166K 150 ...
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... MSPS ADC Evaluation Board The CXA1166K PCB is a tool for customers to evaluate the performance of the CXA1166K (8-bit, 250MHz, high-speed A/D converter). In addition to indispensable features such as the reference voltage generator, this tool equips the input voltage offset generator, clock decimator, output date latches, 10-bit high-speed DAC, and 20-pin cable connector for digital outputs ...
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... CXA1166K 1: ECL High level, 0: ECL Low level …… …… ...
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... A/D Full Scale (VR2) The volume to adjust A/D converter V 3) Linearity (VR3) The volume to adjust the VRM (linearity) voltage by shorting the J1 – – 2 Tdh 1.8ns (Typ) N – 2 Tdh 1.8ns (Typ) voltage (–2V typ.). RB – 19 – CXA1166K – ...
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... 1/128 H = ECL High level ; L = ECL Low level 7) SW4 The switch for LINV High/Low. 8) SW5 The switch for MINV High/Low. 9) SW6 (D/A INV) The switch for D/A converter output inversion. – 20 – CXA1166K ...
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... The input circuit example to improve the SNR is shown in Fig.4. See the measured data in Fig for the SNR and the input circuit characteristics. 14) The part number of the digital output connector mounted on the PCB is KEL 8830E-020-170S. A corresponding connector and cable assembly is JUNKOSHA KB0020MCG50B1. 1.2mm Monitoring point Fig. 3. – 21 – CXA1166K ...
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... From offset circuit 240 AMP. IN 3pF 68 AGND AGND Fig. 4. Example of SNR Improvement Circuit 5pF 560 CLC409 3 – 22 – CXA1166K V IN2 V IN2 120 V IN1 V IN1 V (– 2V) RB ...
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... V QO QON C5 F1 COUTN C6 F0 COUT GND GND DGND DIN DOUT DINB NC DOUTB REF – 23 – CXA1166K ...
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... Characteristics 2 0 – 2 – 4 – 6 – 8 Fig.5. CXA1166K PCB Schematic Diagram Fig.4. Example of SNR Improvement Circuit – 10 – Fig.5. CXA1166K PCB Schematic Diagram Fig.4. Example of SNR Improvement Circuit Fig.8. 2nd, 3rd Harmonic distortion vs. Input frequency – 20 Fig.5. Schematic Diagram (2nd Harmonic distortion) – ...
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... Parts Layout Component side Soldering side – 25 – CXA1166K ...
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... Printed Pattern Component side Soldering side – 26 – CXA1166K ...
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... GND layer (inner layer) V layer (inner layer) EE – 27 – CXA1166K ...
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... Package Outline Unit: mm SONY CODE EIAJ CODE JEDEC CODE 68PIN LCC (CERAMIC) 21.59 ± 0.2 1.27 ± 0.2 15.85 ± 0.2 1.27 0.915 ± 0.07 R0.2 PIN NO.1 INDEX 2.16 ± 0.25 PACKAGE STRUCTURE PACKAGE MATERIAL LCC-68C-01 LEAD TREATMENT QFN068-C-S950-A LEAD MATERIAL PACKAGE WEIGHT – 28 – CXA1166K CERAMIC GOLD PLATING 3.7g ...