ls7215 LSI Computer Systems, Inc., ls7215 Datasheet

ls7215

Manufacturer Part Number

ls7215

Description

Programmable Digital Delay Timer

Manufacturer

LSI Computer Systems, Inc.

Datasheet

1.LS7215.pdf (8 pages)

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7215-072009-1

FEATURES:

• Programmable delay from microseconds to days

• Programmable delay controlled by 8 binary-weighted delay inputs

• On chip oscillator (RC or Crystal) or external clock time base

• Selectable prescaler for real time delay generation based

• Four operating modes

• Reset input for delay abort

• Low quiescent and operating current

• Direct relay drive

• +3V to +18V operation (V

• LS7215, LS7216 (DIP); LS7215-S, LS7216-S (SOIC) - See Figure 1 -

DESCRIPTION:

The LS7215 and LS7216 are CMOS integrated circuits for gener-

ating digitally programmable delays. The delay is controlled by 8 bi-

nary weighted inputs, WB0 - WB7, in conjunction with an applied

clock or oscillator frequency. The programmed time delay man-

ifests itself in the Delay Output (OUT) as a function of the Oper-

ating Mode selected by the Mode Select inputs A and B: One-Shot,

Delayed Operate, Delayed Release or Dual Delay. The time de-

lay is initiated by a transition at the Trigger Input (TRIG).

I/O DESCRIPTION:

MODE SELECT Inputs A & B (Pins 1 & 2)

The 4 operating modes are selected by Inputs A and B

according to Table 1

One-Shot Mode (OS)

A positive transition at the TRIG input causes OUT to switch low

without delay and starts the delay timer. At the end of the pro-

grammed delay timeout, OUT switches high. If a delay timeout is in

progress when a positive transition occurs at the TRIG input, the

delay timer will be restarted. A negative transition at the TRIG input

has no effect.

Delayed Operate Mode (DO)

A positive transition at the TRIG input starts the delay timer. At the

end of the delay timeout, OUT switches low. A negative transition

at the TRIG input causes OUT to switch high without delay. OUT is

high when TRIG is low.

that can be latched from a shared 8-bit bus

on 50Hz/60Hz time base or 32,768Hz watch crystal

Each input has an internal pull-up resistor of about 500k .

LSI/CSI

U L

A3800

LSI Computer Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747

TABLE 1. MODE SELECTION

PROGRAMMABLE DIGITAL DELAY TIMER

MODE

One-Shot (OS)

Delayed Operate (DO)

Delayed Release (DR)

Dual Delay (DD)

- V

)

Delayed Release Mode (DR)

A negative transition at the TRIG input starts the delay timer.

At the end of the delay timeout, OUT switches high. A pos-

tive transition at the TRIG input causes OUT to switch low

without delay. OUT is low when TRIG is high.

Dual Delay Mode (DD)

A positive or negative transition at the TRIG input starts the

delay timer. At the end of the delay timeout, OUT switches to

the logic state which is the inverse of the TRIG input. If a de-

lay timeout is in progress when a transition occurs at the

TRIG input, the delay timer is restarted.

XTLI/CLOCK

RC/CLOCK

RCS/CLKS

OD OUT

PSCLS

RESET

(631) 271-0400 FAX (631) 271-0405

XTLO

LS7215

LS7216

(+V )

OUT

(-V )

PIN ASSIGNMENT - TOP VIEW

FIGURE 1

TRIG

July 2009

LOAD

WB6

WB3

WB0

WB1

WB2

WB3

WB5

WB6

WB7

LOAD

WB0

WB1

WB4

WB7

WB4

WB2

WB5

Related parts for ls7215

ls7215 Summary of contents

Page 1

... • LS7215, LS7216 (DIP); LS7215-S, LS7216-S (SOIC) - See Figure 1 - DESCRIPTION: The LS7215 and LS7216 are CMOS integrated circuits for gener- ating digitally programmable delays. The delay is controlled by 8 bi- nary weighted inputs, WB0 - WB7, in conjunction with an applied clock or oscillator frequency ...

Page 2

... XTLI/CLOCK input and the XTLO output (Pin 5). LS7215 TIME BASE SELECT Input (RCS/CLKS, Pin 5) For LS7215, the external clock operation at Pin 4 is selected by ap- plying a logic low to the RCS/CLKS input. The internal oscillator option with RC timer at Pin 4 is selected by applying a logic high at the RCS/ CLKS input ...

Page 3

ABSOLUTE MAXIMUM RATINGS: (All voltages referenced Supply Voltage Voltage (Any Pin) Operating Temperature Storage Temperature ELECTRICAL CHARACTERISTICS (Voltages referenced to Vss) Characteristic SYMBOL Supply Voltage V Supply Current I DD Input Voltages: Reset, Trigger Low V Reset, ...

Page 4

... Switching Characteristics (See Fig Oscillator Frequency f External Clock or f Crystal Oscillator Frequency f TRIG Set-Up Time A, B Set-Up Time Clock to Out Delay +V 500k 500k B 2 TRIG 19 500k 7 RESET CLOCK/RC/XTLI 4 OSC XTLO (LS7216) 5 RCS/CLKS (LS7215) 5 500k +V PSCLS 6 7215-062309 Min Max Min 3.0 - 1.8 - 10.0 - 4.5 - osc 18.0 - 8 ...

Page 5

Clock TRIG A, B WB0-WB7 WB0-WB7 (Internal) LOAD OUT Note 1. TRIG input is clocked in by the negative edge of external clock. Note 2. Inputs A, B are sampled only at a TRIG input transition and ignored ...

Page 6

... FIGURE 7. DRIVING CLOCK INPUT FROM THE AC LINE + LOAD * * LS7215 9 OUT FIGURE 8. DELAY EXTENSION BY CASCADING 470k 5 XTLO LS7216 10M 4 XTLI + V LS7215 1M 4 CLOCK 200pF LOAD 11-18 8 WB0-WB7 LS7215 19 TRIG OUT 4 CLOCK LS7215 4 CLOCK 4 CLOCK LS7216 OUT ...

Page 7

... XTLO WB5 6 WB6 PSCLS WB7 LS7216 7 RESET 8 Vss 9 OUT Switch: S1 low: Delay increment = 1s; Maximum Delay = 255s S1 high: Delay increment = 1m; Maximum Delay = 255m 11-18 WB0-WB7 LS7215/ LOAD IO 11-18 WB0-WB7 LS7215/16 20 LOAD + 1s/1m 18 2s/2m 17 4s/ 8s/8m 16s/16m 14 32s/32m 13 12 64s/64m 11 128s/128m s = seconds m = minutes + ...

Page 8

CASE 1. MODE = DO or DR; PRESCALE FACTOR this setup a frequency division of the input clock, ƒ factor 257, in increments of 1 can be obtained ...

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