ls7215 LSI Computer Systems, Inc., ls7215 Datasheet - Page 8

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ls7215

Manufacturer Part Number
ls7215
Description
Programmable Digital Delay Timer
Manufacturer
LSI Computer Systems, Inc.
Datasheet
7215-081806-8
ƒo
Case 1, Mode = DO;
ƒo
Case 2, Mode = DD;
EXAMPLES OF CASE 1 and CASE 2 FREQUENCY DIVISIONS WITH W = 2
CASE 1. MODE = DO or DR; PRESCALE FACTOR, S = 1
CASE 2. MODE = DD; PRESCALE FACTOR, S = 1
ƒi
In this setup a frequency division of the input clock, ƒi by a factor of 2 to 257, in increments of 1 can
be obtained according to the equation:
The ƒo pulse widths are symmetrical with 50% duty -cycle
The ƒo pulse width is non-symmetrical (non-50% duty -cycle)
In this setup a frequency division of the input clock, ƒi by a factor of 2 to 512, in increments of 2 can
be obtained according to the equation:
ƒo
+V
÷
÷
ƒi
6
4
FIGURE 11. PROGRAMMABLE FREQUENCY DIVIDER
ƒo =
ƒo =
19
W + 2
2
2 (W + 1)
1
4
7
9
ƒi
ƒi
TRIG
CLOCK
B
RESET
OUT
A
where W (weighting factor) = 0 to 255
where W (weighting factor) = 0 to 255
LS7216
3
V
+V
Vss
DD
8
WB0
WB1
WB2
WB3
WB4
WB5
WB6
WB7
18
17
16
15
14
13
12
11

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