Manufacturer Part Numberlc72133m
DescriptionPll Frequency Synthesizer For Electronic Tuning
ManufacturerSanyo Semiconductor Corporation
lc72133m datasheet
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Ordering number : ENN5427B
The LC72133M and LC72133V are a phase-locked loop
frequency synthesizer LSI circuits for use in radio tuners.
It supports low-voltage (2.7 to 3.6 V) operation and can
implement high-performance AM/FM tuners easily.
• High speed programmable dividers
— FMIN: 10 to 120 MHz ..........pulse swallower
(built-in divide-by-two prescaler), V
10 to 130 MHz ..........pulse swallower
(built-in divide-by-two prescaler), V
— AMIN: 2 to 40 MHz ..............pulse swallower
0.5 to 10 MHz division
• IF counter
0.4 to 12 MHz ...........AM/FM IF counter
• Reference frequencies
— Twelve selectable frequencies
(4.5 or 7.2 MHz crystal)
1, 3, 5, 9, 10, 3.125, 6.25, 12.5, 15, 25, 50 and 100 kHz
• CCB is a trademark of SANYO ELECTRIC CO., LTD.
• CCB is SANYO’s original bus format and all the bus
addresses are controlled by SANYO.
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
LC72133M, 72133V
PLL Frequency Synthesizer for
• Phase comparator
— Dead zone control
— Unlock detection circuit
— Deadlock clear circuit
• Built-in MOS transistor for forming an active low-pass
• I/O ports
— Dedicated output ports: 4
— Input or output ports: 2
— Support clock time base output
≥ 2.7 V
• Serial data I/O
— Support CCB format communication with the
≥ 3.0 V
system controller. (Compatible with LC72131)
• Operating ranges
— Supply voltage........................2.7 to 3.6 V
— Operating temperature............–20 to +70°C
• Package
91099TH (OT)/22897HA (OT)/63196HA (OT) No. 5427-1/23
Electronic Tuning

lc72133m Summary of contents

  • Page 1

    ... Ordering number : ENN5427B Overview The LC72133M and LC72133V are a phase-locked loop frequency synthesizer LSI circuits for use in radio tuners. It supports low-voltage (2.7 to 3.6 V) operation and can implement high-performance AM/FM tuners easily. Functions • High speed programmable dividers — FMIN 120 MHz ..........pulse swallower (built-in divide-by-two prescaler 130 MHz ...

  • Page 2

    ... XOUT max BO1 to BO4, IO1, IO2, AOUT max BO1 max AOUT max BO2 to BO4, IO1, IO2 O Ta ≤ 70°C: LC72133M Pd max Ta ≤ 70°C: LC72133V Topr Tstg [LC72133V 0.15 6.7 0.22 0.65 0.43 SANYO: SSOP20 Ratings –0.3 to +5.5 –0.3 to +5.5 – ...

  • Page 3

    ... Crystal oscillator: HC-49/U (manufactured by Kinseki, Ltd.), The circuit constants for the crystal oscillator circuit depend on the crystal used, the printed circuit board pattern, and other items. Therefore we recommend consulting with the manufacturer of the crystal for evaluation and reliability. LC72133M, 72133V = Pins ...

  • Page 4

    ... High level three-state I OFFH off leakage current Low level three-state I OFFL off leakage current Input capacitance Current drain LC72133M, 72133V Pins Conditions XIN FMIN AMIN IFIN FMIN AMIN CE, CL, DI, IO1, IO2 – 0 ...

  • Page 5

    ... Pin Assignment Block Diagram XIN 1 20 XOUT 14 1/2 FMIN 13 AMIN CCB I POWER RESET LC72133M, 72133V 1 XIN BO1 6 BO2 7 BO3 8 S BO4 IO1 Top view REFERENCE DIVIDER SWALLOW COUNTER 1/16, 1/17 4bits ...

  • Page 6

    ... DO 5 Data output V 15 Power supply DD LC72133M, 72133V Functions • Crystal resonator connection (4.5/7.2 MHz) • FMIN is selected when the serial data input DVS bit is set to 1. • The input frequency range is from 10 to 130 MHz. • The input signal passes through the internal divide-by- two prescaler and is input to the swallow counter. • ...

  • Page 7

    ... LPF amplifier AOUT 18 transistor IFIN 11 IF counter LC72133M, 72133V Functions • The LC72133 ground • Dedicated output pins • The output states are determined by BO1 to BO4 bits in the serial data. Data open low • A time base signal (8 Hz) can be output from the BO1 pin. (When the serial data TBC bit is set to 1.) • ...

  • Page 8

    ... The LC72133 inputs and outputs data using the Sanyo CCB (computer control bus) audio LSI serial bus format. This LSI adopts an 8-bit address format CCB. I/O mode B0 1 IN1 (82 IN2 (92 OUT (A2 CL: Normal high CL: Normal low LC72133M, 72133V Address ...

  • Page 9

    ... DI Control Data (Serial Data Input) Structure • IN1 Mode Address First Data IN1 • IN2 Mode Address First Data IN2 LC72133M, 72133V A11918 A11919 No. 5427-9/23 ...

  • Page 10

    ... Output port data • Data that determines the output from the BO1 to BO4, IO1 and IO2 output ports BO1 to BO4, IO1, IO2 Data open low (5) • The data = 0 (open) state is selected after the power-on reset. LC72133M, 72133V Functions SNS LSB Divisor setting (N) P0 ...

  • Page 11

    ... BO1 pin. (BO1 data is invalid in this mode.) Charge pump control data • Forcibly controls the charge pump output. DLC (10) Note: If deadlock occurs due to the VCO control voltage (Vtune) going to zero and the VCO LC72133M, 72133V Functions DOC1 DOC0 DO pin state 0 ...

  • Page 12

    ... UL 1: Locked or detection stopped mode IF counter binary data • Latched from the value of the IF counter (20-bit binary counter). C19 to C0 C19 (3) C0 LSB of the binary counter LC72133M, 72133V Functions These values must all be set Functions High: 1 Low: 0 MSB of the binary counter Related data : " ...

  • Page 13

    ... DO CL: Normal low Note: Since the DO pin is an n-channel open-drain circuit, the time for the data to change (t resistor and printed circuit, board capacitance. LC72133M, 72133V ≥ 0.75 µ < 0.75 µ ...

  • Page 14

    ... EL CE setup time hold time t EH Data latch change time Data output time t DH LC72133M, 72133V When stopped with CL low When stopped with CL high ...

  • Page 15

    ... MW, 10 kHz steps (DVS = 0, SNS = 0, AMIN low-speed side selected 1000 kHz (IF = +450 kHz) MW VCO = 1450 kHz PLL fref = 10 kHz ( 1450 kHz (MW VCO) 10 kHz (fref) = 145 LC72133M, 72133V 4bits (A) 1/2 Swallow Counter (C) (B) SNS Set divisor 272 to 65535 ...

  • Page 16

    ... When the measurement period (GT ms, the count (C) is 53980 hexadecimal (342400 decimal): IF frequency (Fc) = 342400 10.7 MHz 0 • When the measurement period (GT ms, the count (C) is E10 hexadecimal (3600 decimal): IF frequency (Fc) = 3600 450 kHz 0 LC72133M, 72133V (20-bit binary counter) (Fc ...

  • Page 17

    ... IFS 70 mVrms 1: Normal mode (0 mVrms) 100 mVrms 0: Degradation mode ( mVrms) Note: Values in parentheses are actual performance values presented as reference data. LC72133M, 72133V Data with CTE = 1 Measurement period GT Wait time Count start f (MHz) 0.5 ≤ f < ≤ f ≤ 12 ...

  • Page 18

    ... Figure 1 Unlocked State Detection Timing For example, if fref is 1 kHz, i.e., the period is 1 ms, after changing the divisor N, the system must wait at least 2 ms before checking for the unlocked state. VCO DATA LATCH LC72133M, 72133V New data Old divisor N New divisor N' The divisor N is not updated in the first period. Note: After changing the divisor, ø ...

  • Page 19

    ... Since the locking state (high = locked, low = unlocked) is output directly from the DO pin, the dummy data processing described in section 3 above is not required. After changing the divisor N, the locking state can be checked after waiting at least two reference frequency periods. LC72133M, 72133V Data input New data ...

  • Page 20

    ... AM stereo pilot margin is desired. On the other hand, we recommend selecting DZC or DZD, which provide a dead zone, for applications which do not require such a high FM signal-to-noise ratio and in which either AM stereo is not used or an adequate AM stereo pilot margin can be achieved. LC72133M, 72133V ...

  • Page 21

    ... CC 7. Front end connection example Since this product is designed with the relatively high resistance of 200 kΩ for the pull-down (on) resistors built in to the FMIN and AMIN pins, a common AM/FM local oscillator buffer can be used as shown in the following circuit. LC72133M, 72133V RF MIX fr Phase ...

  • Page 22

    ... FM OSC AM OSC FE Pin States After the Power ON Reset Open Open Open Open Open Input port LC72133M, 72133V OSC buffer out XIN BO1 BO2 BO3 BO4 IO1 FMIN On resistance: 200 k AMIN On resistance: 200 k PLL A10186 XOUT V SS AOUT AIN ...

  • Page 23

    ... SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of September, 1999. Specifications and information herein are subject to change without notice. LC72133M, 72133V 1 20 XOUT XIN CE ...