cxa2025as Sony Electronics, cxa2025as Datasheet - Page 31

• Manufacturer Part Number: cxa2025as
• Description: Y/c/rgb/sync/deflection For Color Tv
• Manufacturer: Sony Electronics

The G-Y signal is generated as the base of Y, color difference signals at the axis adjustment circuit.The Y
signal is added to R-Y, G-Y, and B-Y respectively and these signals become R, G, and B signals.And they are
input to the RGB block.
6) RGB signal processing
The RGB signals obtained from the Y/C block pass through the half-tone switch circuit (YM SW), the switch
circuit for the external RGB signal (YS SW), the picture control, dynamic color, gamma compensation, clamp,
brightness control, drive adjustment, cut-off adjustment and auto cut-off circuits, and are output to Pins 20, 22
and 24.
The RGB signals input to Pins 16, 17 and 18 are the level at which a normal video standard, 100 IRE, 100%
white signal becomes a 0.7Vp-p signal.
The voltage applied to Pin 26 (ABLIN) is compared with the internal reference voltage, integrated by the
capacitor which is connected to Pin 27, and performs picture control and brightness control. In order to adjust
the white balance (black balance), this IC has a drive control function which adjusts the gain between the RGB
outputs and a cut-off control function which adjusts the DC level between the RGB outputs. Both drive control
and cut-off control are adjusted by the I
function (AKB) which forms a loop between the IC and CRT and performs adjustment automatically has also
been added. This function can compensate for changes in the CRT with time. Auto cut-off operation is as
follows.
The Rch for the reference voltage in the IC is fixed and the G and Bch are cut-off controlled by the I
During G/B-CUTOFF center status, the loop functions so that the Rch for the reference pulse input to Pin 25 is
1Vp-p and the G and Bch are 0.83Vp-p.
The reference pulse timing can be varied by the I
When AKB is not used, the IC can be set to manual cut-off adjustment mode with I
the DC level of the R, G and B outputs can be varied by applying voltages independently to Pins 19, 21 and
23.
4. Notes on operation
When designing the board pattern for the CXA2025AS, interference from around the power supply and GND
should be considered as the RGB and deflection signals output from the CXA2025AS are DC direct connected.
Do not separate the GND patterns for each pin; a solid earth is ideal. Locate the power supply side of the by-
pass capacitor which is inserted between the power supply and GND as near to the pin as possible. Also,
locate the XTAL oscillator, ceramic oscillator and IREF resistor as near to the pin as possible, and do not wire
signal lines near this pin.
Drive the Y, external Y/color difference and external RGB signals at a sufficiently low impedance, as these
signals are clamped when they are input using the capacitor connected to the input pin.
The built-in capacitor receives the chroma signal, so apply a DC bias of about V
chroma signal at a sufficiently low impedance.
• R, G and B reference pulses for auto cut-off, shifted 1H each in the order mentioned, appear at the top of
• The cathode current (IK) of each R, G and B output is converted to a voltage and input to Pin 25.
• The voltage input to Pin 25 is compared with the reference voltage in the IC, and the current generated by
• The loop functions to change the DC level of the R, G and B outputs in accordance with the capacitor pin
the picture (actually, in the overscan portion). The reference pulse uses 1H in the V blanking interval, and is
output from each R, G and B output pin.
the resulting error voltage charges the capacitors connected to Pins 19, 21 and 23 for the reference pulse
interval and is held during all other interval.
voltage so that the Pin 25 voltage matches the reference voltage in the IC.
2
C bus, with the Rch fixed and the G and Bch variable. An auto cut-off
2
C bus.
– 31 –
CC
2
C bus settings. In this case,
/2 externally and input the
CXA2025AS
2
C bus.