em78p134n ELAN Microelectronics Corp, em78p134n Datasheet

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em78p134n

Manufacturer Part Number
em78p134n
Description
8-bit Microcontroller With Otp Rom
Manufacturer
ELAN Microelectronics Corp
Datasheet
EM78P134N
8-Bit Microcontroller
with OTP ROM
Product
Specification
D
. V
1.6
OC
ERSION
ELAN MICROELECTRONICS CORP.
June 2010

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em78p134n Summary of contents

Page 1

... EM78P134N 8-Bit Microcontroller with OTP ROM Specification ELAN MICROELECTRONICS CORP. Product ERSION June 2010 1.6 ...

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... Trademark Acknowledgments: IBM is a registered trademark and PS trademark of IBM. Windows is a trademark of Microsoft Corporation. ELAN and ELAN logo © 2008~2010 by ELAN Microelectronics Corporation Copyright All Rights Reserved Printed in Taiwan The contents of this specification are subject to change without further notice. ELAN Microelectronics assumes no responsibility concerning the accuracy, adequacy, or completeness of this specification ...

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... Contents 1 General Description .................................................................................................. 1 2 Features ..................................................................................................................... 1 3 Pin Assignment ......................................................................................................... 2 4 Pin Description.......................................................................................................... 3 4.1 EM78P134N − 10 pins ............................................................................................... 3 5 Functional Description ............................................................................................. 4 5.1 Operational Registers......................................................................................... 5 5.1.1 R0 (Indirect Addressing Register) ....................................................................... 5 5.1.2 R1 (Timer Clock/Counter) ................................................................................... 5 5.1.3 R2 (Program Counter) and Stack........................................................................ 5 5.1.4 R3 (Status Register) ............................................................................................ 7 5.1.5 R4 (RAM Select Register)................................................................................... 7 5.1.6 R5 (Unused) ........................................................................................................ 7 5.1.7 R6 (Port 6)........................................................................................................... 7 5 ...

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Contents 5.4 I/O Ports ........................................................................................................... 19 5.5 Reset and Wake-up.......................................................................................... 22 5.5.1 Reset .................................................................................................................22 5.5.2 Wake-up and Interrupt Modes Operation Summary .........................................24 5.5.3 /RESET Configuration .......................................................................................30 5.5.4 Status of RST, T, and P of the Status Register..................................................30 5.6 Interrupt ............................................................................................................ ...

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Electrical Characteristics ....................................................................................... 52 7.1 DC Electrical Characteristics............................................................................ 52 7.2 Comparator Characteristics.............................................................................. 54 7.3 AC Electrical Characteristics ............................................................................ 55 8 Timing Diagram ....................................................................................................... 56 Doc. Version Initial version 1.0 Modified the package type description 1.1 Added description of RC ...

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Contents vi • Product Specification (V1.6) 06.02.2010 ...

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... Several code option bits are available to meet user’s requirements. With its enhanced OTP-ROM feature, the EM78P134N provides a convenient way of developing and verifying user’s programs. Moreover, this OTP device offers the advantages of easy and effective program updates, using development and programming tools ...

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... EM78P134N 8-Bit Microcontroller with OTP ROM 3 Pin Assignment Figure 3-1 EM78P134NMS10J 2 • Figure 3-2 EM78P134NSS10 J Product Specification (V1.6) 06.02.2010 (This specification is subject to change without further notice) ...

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... Pin Description 4.1 EM78P134N − 10 pins Symbol Pin No. Type P60~P67 INT PWM /RST CINA- CINB- CINC- CIN1+ CO TCC OSCI OSCO VDD VSS Product Specification (V1.6) 06.02.2010 (This specification is subject to change without further notice) 8-bit general purpose input/output pins. Default value at power-on reset. ...

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... EM78P134N 8-Bit Microcontroller with OTP ROM 5 Functional Description 4 • Figure 5-1 Functional Block Diagram (This specification is subject to change without further notice) Product Specification (V1.6) 06.02.2010 ...

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... Product Specification (V1.6) 06.02.2010 (This specification is subject to change without further notice) PC (A9~A0) Stack level 1 Stack level 2 Stack level 3 Stack level 4 Stack level 5 Figure 5-2 Program Counter Organization EM78P134N 8-Bit Microcontroller with OTP ROM 000H Reset vector 003H Interrupt vector 00FH On-chip program Memory 3FFH ...

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... EM78P134N 8-Bit Microcontroller with OTP ROM "CALL" instruction loads the lower 10 bits of the PC, and then PC+1 is pushed onto the stack. Thus, the subroutine entry address can be located anywhere within a page. "RET" ("RETL k", "RETI") instruction loads the program counter with the contents of the top-level stack. " ...

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... NOTE Bit 4 and Bit 3 (T and P) are read only. Set to "1" if the result of an arithmetic or logic operation is zero. Bit 6 Bit 5 Bit 4 P66 P65 P64 input/output. EM78P134N 8-Bit Microcontroller with OTP ROM Bit 3 Bit 2 Bit Bit 3 Bit 2 Bit 1 ...

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... EM78P134N 8-Bit Microcontroller with OTP ROM 5.1 TBLP : Table Point Register ) Bit 7 TBA7 Bits (TBA7 ~ TBA0): Table Point Address Bits 5.1 TBHP : Table Point Register ) Bit 7 HLB Bit 7 (HLB): Take MSB or LSB as machine code. Bits (Unused): Unused bits, set to 0 all the time Bits (TBA9 ~ TBA8): Table Point Address Bits ...

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... Bit 4 CIRL1 CIRL0 disables, this bit must also be set Disable internal voltage reference, CIN+ external source (default value) If the comparator is disabled, P61/PWM/CIN+ pin acts as I/O. 1: Enable internal voltage reference. P61/PWM/CIN+ pin acts as I/O. EM78P134N 8-Bit Microcontroller with OTP ROM Prescale 1:1 (default) 1:2 1:4 1:8 ...

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... EM78P134N 8-Bit Microcontroller with OTP ROM Bits (CIRL2 ~ CIRL0): Comparator internal reference level CIRL2 Bit 3 (CPOUT): Result of the comparator output. Bit 2 (COE): Comparator enable bit (RB effect when this bit = 1) Bits (CRCS1 ~ CRCS0): Comparator CIN- channel switch ...

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... Disable Port 6 input change to wake-up status 1: Enable Port 6 input change wake-up status When the Port 6 Input Status Change is used to enter an interrupt vector or to wake-up the EM78P134N from sleep mode, the ICWE bit must be set to “Enable“. EM78P134N 8-Bit Microcontroller with OTP ROM ...

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... EM78P134N 8-Bit Microcontroller with OTP ROM 5.1.16 RF (Interrupt Status Register) Bit 7 0 “1” means there is an interrupt request Bits (Unused): Unused bits, set to 0 all the time. Bit 4 (PWMIF): PWM (Pulse Width Modulation) interrupt flag. Set when a selected Bit 3 (CMPIF): Comparator interrupt flag. Set when a change occurs in the Bit 2 (EXIF): External interrupt flag ...

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... Bit 6 Bit 5 Bit 4 IOC65 IOC64 0: defines the relative I/O pin as output 1: puts the relative I/O pin into high impedance EM78P134N 8-Bit Microcontroller with OTP ROM Low P62 TCC Rate 1:2 1:4 1:8 1:16 1:32 1:64 1:128 1:256 Bit 3 Bit 2 Bit 1 IOC63 IOC62 IOC61 ...

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... EM78P134N 8-Bit Microcontroller with OTP ROM 5.2.5 IOC7 (TMRH: Most Significant Bits of the PWM Timer) Bit 7 0 Bits (unused): unused bits, set to 0 all the time. Bits (TMR[9]~TMR[8]): most significant bits of the PWM timer, read-only bit. Bits (PRD[9]~PRD[8]): most significant bits of the PWM time period. ...

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... Bit 5 Bit 4 OD66 OD65 OD64 0: Disable open-drain output 1: Enable open-drain output Bit 6 Bit 5 Bit 4 /PH65 /PH64 0: Enable internal pull-high 1: Disable internal pull-high EM78P134N 8-Bit Microcontroller with OTP ROM Bit 3 Bit 2 Bit 1 0 OD62 OD61 Bit 3 Bit 2 Bit 1 0 /PH62 /PH61 Bit 0 ...

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... EM78P134N 8-Bit Microcontroller with OTP ROM 5.2.12 IOCE (WDT Control Register) Bit 7 WDTE Bit 7 (WDTE): Control bit used to enable the Watchdog Timer Bit 6 (EIS): Control bit used to define the function of the P60 (/INT) pin ■ When EIS is "0," the path of the /INT pin is masked. When EIS is "1," the status of the /INT pin can also be read by way of reading Port 6 (R6) ...

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... When the Comparator output status change is used to enter an interrupt vector or to enter the next instruction, the CMPIE bit must be set to “Enable“. 0: disable EXIF interrupt 1: enable EXIF interrupt 0: Disable ICIF interrupt 1: Enable ICIF interrupt 0: Disable TCIF interrupt 1: Enable TCIF interrupt EM78P134N 8-Bit Microcontroller with OTP ROM • 17 ...

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... EM78P134N 8-Bit Microcontroller with OTP ROM 5.3 TCC/WDT and Prescaler There are two 8-bit counters available as prescalers for the TCC and WDT respectively. The PST0 ~ PST2 bits of the CONT register are used to determine the ratio of the TCC prescaler, and the PSW0 ~ PSW2 bits of the IOCE0 register are used to determine the WDT prescaler ...

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... Figure 5-5 The Circuit of I/O Port and I/O Control Register for Port 6 Product Specification (V1.6) 06.02.2010 (This specification is subject to change without further notice) 8-Bit Microcontroller with OTP ROM PCRD PCWR CLK CLK PDWR PDRD EM78P134N IOD • 19 ...

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... EM78P134N 8-Bit Microcontroller with OTP ROM Note: Pull-high (down), open-drain is not shown in the figure. PORT Note: Pull-high (down), open-drain is not shown in the figure. Figure 5-7 Circuit of I/O Port and I/O Control Register for P61~P67 20 • ...

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... Product Specification (V1.6) 06.02.2010 (This specification is subject to change without further notice) ICIE CLK Usage of Port 6 Input Status Change Wake-up/Interrupt (II) Port 6 Input Status Change Interrupt EM78P134N 8-Bit Microcontroller with OTP ROM ICIF ENI Instruction CLK ...

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... WDT time-out (if enabled), or (3) Port 6 input status changes (if enabled). The first two cases will cause the EM78P134N to reset. The T and P flags of R3 can be used to determine the source of the reset (wake-up). The last case is considered a continuation of program execution and the global interrupt ("ENI" or "DISI" being executed) determines whether or not the controller branches to the interrupt vector following a wake-up ...

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... WDT is enabled before SLEP, Port 6 Input Status Change Interrupt must be disabled. Hence, the EM78P134N can be awakened only by Case Refer to the section on Interrupt. If Port 6 Input Status Changed Interrupt is used to wake-up the EM78P134N (Case [a] above), the following instructions must be executed before SLEP: MOV ...

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... EM78P134N 8-Bit Microcontroller with OTP ROM 5.5.2 Wake-up and Interrupt Modes Operation Summary All categories under wake-up and interrupt modes are summarized below. The controller can be waken-up from sleep mode and idle mode. The wake-up signals are listed as follows: After wake up: ...

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... Next Instruction+ Set RF (PWMIF N/A ENI + IOCF0 (PWMIE)=1 Interrupt Vector (0x0F)+ Set RF (PWMIF IOCF0 (CMPIE) Bit Comparator output status change interrupt is invalid. Next Instruction+ Set RF (CMPIF ENI + IOCF0 (CMPIE) Bit Interrupt Vector (0x0C)+ Set RF (CMPIF Reset (Address 0x00) EM78P134N Normal Mode • 25 ...

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... EM78P134N 8-Bit Microcontroller with OTP ROM Table 5-2 Summary of the Initialized Register Values Address Name Reset Type Bit Name Power-on IOC5 N/A /RESET and WDT (unused) Wake-up from Pin Change Bit Name Power-on N/A IOC6 /RESET and WDT Wake-up from Pin Change Bit Name ...

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... PWME T1EN ACOS1 ACOS0 BCOS1 BCOS0 CCOS1 CCOS0 DCOS1 DCOS0 EM78P134N Bit 3 Bit 2 Bit 1 Bit ...

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... EM78P134N 8-Bit Microcontroller with OTP ROM Address Name Reset Type Bit Name Power-on RC × /RESET and WDT (CMPCON II) Wake-up from Pin Change Bit Name Power-on × /RESET and WDT Wake-up from Pin Change Bit Name Power-on RE × /RESET and WDT ...

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... Unknown or don’t care P: Previous value before reset EM78P134N 8-Bit Microcontroller with OTP ROM Bit 4 Bit 3 Bit 2 Bit 1 DT[4] DT[3] DT[2] DT[ /PD60 ...

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... EM78P134N 8-Bit Microcontroller with OTP ROM 5.5.3 /RESET Configuration Refer to Figure 5-8 when the reset bit in the Option word is programmed to 0, the external /RESET is enabled. When programmed to 1, the internal /RESET is enabled, tied to the internal Vdd and the pin is defined as P63. 5.5.4 Status of RST, T, and P of the Status Register A reset condition is initiated by the following events: 1 ...

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... R6, R6") is necessary. Each pin of Port 6 will have this feature if its status changes. Any pin configured as output or P60 pin configured as /INT, is excluded from this function. The Port 6 Input Status Changed Interrupt can wake up the EM78P134N from sleep mode if Port 6 is enabled prior to going into sleep mode by executing SLEP instruction ...

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... If another interrupt occurs, ACC, R3, and R4 will be replaced by the new interrupt. After the interrupt service routine is completed, ACC, R3, and R4 registers are restored. Interrupt sources ENI/DISI In EM78P134N, each individual interrupt source has its own interrupt vector as depicted in the table below. Interrupt Vector 003H 006H ...

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... IOCF IOCFRD RFWR Figure 5-11 Interrupt input Circuit DTH+DTL Fosc TMRH+TMRL MUX PRD TP1 TP0 TEN Figure 5-12 PWM Functional Block Diagram EM78P134N 8-Bit Microcontroller with OTP ROM IRQn IRQm RFRD IOD D IOCFWR TO PWMIF latch DLH+DLL Duty Comparator match R Q reset ...

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... EM78P134N 8-Bit Microcontroller with OTP ROM 5.7.2 Increment Timer Counter (TMRX: TMRH/TMRL) TMRX are 10-bit clock counters with programmable prescalers. They are designed for the PWM module as baud rate clock generators. TMRX can be read only. If employed, they can be turned off for power saving by setting the T1EN Bit [RB<3> ...

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... DTX ⎝ ⎠ F OSC Fosc = 4 MHz; ⎛ × ⎜ Duty cycle 10 ⎝ EM78P134N 8-Bit Microcontroller with OTP ROM ( ) × TMRX prescale value TMRX ( ⎞ 1 × = ⎟ μ ⎠ • 35 ...

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... EM78P134N 8-Bit Microcontroller with OTP ROM 5.8.2 Function Description The following figure shows the TMRX block diagram followed by descriptions of its signals and blocks: Fosc: Input clock Prescaler (TP2, TP1 and TP0 ): The Options 1:1, 1:2, 1:4, 1:8, 1:16, 1:64, 1:128, and 1:256 are defined by TMR cleared when any type of reset occurs. ...

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... Comparator The EM78P134N has one comparator comprising of five analog inputs and one output. The comparator can be utilized to wake up the EM78P134N from sleep mode. The comparator circuit diagram is depicted in the figure below. 5.9.1 External Reference Signal The analog signal that is presented at CinX– is compared to the signal at Cin+, and the ...

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... EM78P134N 8-Bit Microcontroller with OTP ROM 5.9.2 Comparator Outputs The compared result is stored in the CPOUT of RB. The comparator outputs are sent to CO (P60) by programming Bit 1, Bit 0<COS1, COS0> of the RB register to <1, X>. See Section 6.2.6, RB for Comparator select bits function description. ■ The CO and PWM of the P60/INT/CO pins cannot be used at the same time. ...

Page 45

... Oscillator 5.10.1 Oscillator Modes The EM78P134N can be operated in four different oscillator modes, such as High Crystal oscillator mode (HXT), Low Crystal oscillator mode (LXT), External RC oscillator mode (ERC), and RC oscillator mode with Internal RC oscillator mode (IRC). One of the four modes can be selected by programming the OSC3, OSC2, OCS1, and OSC0 in the Code Option register ...

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... EM78P134N 8-Bit Microcontroller with OTP ROM 5.10.2 Crystal Oscillator/Ceramic Resonators (Crystal) The EM78P134N can be driven by an external clock signal through the OSCO pin as illustrated below. In most applications, Pin OSCI and Pin OSCO can be connected with a crystal or ceramic resonator to generate oscillation. Figure 5-18 depicts such a circuit. The same applies to the HXT mode and the LXT mode ...

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... Microcontroller with OTP ROM Frequency Mode Frequency 455kHz HXT 2.0 MHz 4.0 MHz 32.768kHz LXT 100kHz 200kHz 455kHz 1.0 MHz HXT 2.0 MHz 4.0 MHz Figure 5-19 External RC Oscillator Mode EM78P134N C1 (pF) C2 (pF) 100~150 100~150 20~40 20~40 10~30 10~ 20~40 20~150 15~30 ...

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... The frequency drift is ± 30% 5.10.4 Internal RC Oscillator Mode The EM78P134N offers a versatile internal RC mode with default frequency value of 4 MHz. Internal RC oscillator mode has other frequencies (16 MHz, 8 MHz, and 455kHz) that can be set by Code Option (Word 1), RCM1, and RCM0. The Table below describes the EM78P134N internal RC drift with voltage, temperature, and process variations ...

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... EM78P134N 8-Bit Microcontroller with OTP ROM * C0 Frequency (MHz) (1-24.2%) × (1-23.1%) × (1-21.9%) × (1-20.6%) × (1-19.4%) × (1-18%) × (1-16.7%) × (1-15.3%) × (1-13.8%) × (1-12.3%) × (1-10.7%) × (1-9.1%) × ...

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... Power-on Considerations Any microcontroller is not warranted to start operating properly before the power supply has stabilized to a steady state. The EM78P134N has a built-in Power-on Reset (POR) with reset level range of 1.7V to 1.9V. The circuitry eliminates the extra external reset circuit. It will work well if Vdd rises quickly enough (50ms or less). However, under critical applications, extra devices are still required to assist in solving power-on problems ...

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... Figure 5-21 and Figure 5-22 show how to create a protection circuit against residual voltage. 5.12 Code Option Register The EM78P134N has Code Option words that are not part of the normal program memory. The option bits cannot be accessed during normal program execution. Code Option Register and Customer ID Register arrangement distribution: ...

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... Low Bit 12: unused bit, set to 0 all the time. Bit 11 (CLKS): Instruction period selection bit Bits (TYPE1 ~ TYPE0): these bits must always be set to 0 for EM78P134N Bits (LVR1 ~ LVR0): Low Voltage Reset enable bits LVR1, LVR0 Bit 6 (RESETDG): Reset pin delete glitch function Bit 5 (ENWDT): Watchdog timer enable bit ...

Page 53

... RCM 0 Frequency (MHz 455kHz Oscillator Modes Pin Function OSCO pin is open drain OSCO output system clock (default) EM78P134N 8-Bit Microcontroller with OTP ROM Bit 4 Bit 3 Bit 2 Bit 1 OSC3 OSC2 OSC1 OSC0 High High High High Low ...

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... EM78P134N 8-Bit Microcontroller with OTP ROM 5.12.3 Customer ID Register (Word 2) Bit Bit 12 Bit 11 Bit 10 Mnemonic 1 1 CMP_DE High Low Bit 12 (Unused): unused bit, set to 1 all the time Bit 11 (Unused): unused bit, set to 1 all the time Bit 10 (CMP_DE): comparator de-glitch enable bit ...

Page 55

... A → IOCR 000r IOW R 0010 ENI Enable Interrupt 0011 DISI Disable Interrupt [Top of Stack] → PC 0012 RET [Top of Stack] → PC, 0013 RETI Enable Interrupt CONT → A 0014 CONTR EM78P134N Status Affected None C None None None None None None None • 49 ...

Page 56

... EM78P134N 8-Bit Microcontroller with OTP ROM Binary Instruction 0 0000 0001 rrrr 0 0000 01rr rrrr 0 0000 1000 0000 0 0000 11rr rrrr 0 0001 00rr rrrr 0 0001 01rr rrrr 0 0001 10rr rrrr 0 0001 11rr rrrr 0 0010 00rr rrrr 0 0010 01rr rrrr 0 0010 10rr rrrr ...

Page 57

... A, [Top of Stack] → PC 1Ckk RETL k k-A → A 1Dkk SUB A,k PC+1 → [SP],001H → PC 1E01 INT k+A → A 1Fkk ADD A Bit7=0, Machine code (7:0) → R 1Err TBRD R Else machine code (12:8) → R EM78P134N Status Affected None None None None 2 None 3 None None None None ...

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... EM78P134N 8-Bit Microcontroller with OTP ROM 6 Absolute Maximum Ratings Temperature under bias Storage temperature Input voltage Output voltage Working Voltage Working Frequency 7 Electrical Characteristics 7.1 DC Electrical Characteristics Ta= 25 ° C, VDD= 5.0V ± 5%, VSS= 0V Symbol Parameter Fxt Crystal: VDD to 2.3V Fxt Crystal: VDD to 3V Fxt ...

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... Output pin floating, WDT enabled Drift Rate Temperature Voltage 25°C 5V 25°C 5V 25°C 5V 25°C 5V Drift Rate Temperature Voltage -40 ~85°C 2.2V~5.5V -40 ~85°C 2.2V~5.5V -40 ~85°C 2.2V~5.5V -40 ~85°C 2.2V~5.5V EM78P134N 8-Bit Microcontroller with OTP ROM Min Typ Max 0.6 2.0 2 1.2 1.4 1.6 2.4 2.6 3 2.4 2.6 3 Min. ...

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... EM78P134N 8-Bit Microcontroller with OTP ROM LVR (Low Voltage Reset) Electrical Characteristics Symbol LVR1 Voltage reset level LVR1 (Schmitt trigger) LVR2 Voltage reset level LVR2 (Schmitt trigger) LVR3 Voltage reset level LVR3 (Schmitt trigger) LVR4 Voltage reset level LVR4 (Schmitt trigger) * VDD Voltage from High to Low ...

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... WDT timeout length is the same as the set-up time (18ms). mode, the WDT timeout length is the same as set-up time (4.5ms). only. on hypothetical results at 25°C. These data are for design reference use only. EM78P134N 8-Bit Microcontroller with OTP ROM Min Typ ...

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... EM78P134N 8-Bit Microcontroller with OTP ROM 8 Timing Diagram AC Test Input/Output Waveform VDD-0.5V GND+0.5V AC Testing: Input is driven at VDD-0.5V for logic 1 measurements are made at 0.7VDD for logic 1 and 0.3VDD for logic 0 RESET Timing (CLK="0") CLK /RESET TCC Input Timing (CLKS="0") ...

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