em78p131a ELAN Microelectronics Corp, em78p131a Datasheet - Page 21

• Manufacturer Part Number: em78p131a
• Description: 8-bit Microcontroller With Otp Rom
• Manufacturer: ELAN Microelectronics Corp

Product Specification (V1.2) 09.16.2009
(This specification is subject to change without further notice)
5.5 Reset and Wake-up
5.5.1 Reset
A Reset is initiated by one of the following events:
1) Power-on reset
2) /RESET pin input "low"
3) WDT time-out (if enabled)
The device is kept under reset condition for a period of approximately 18ms
oscillator start-up timer period) after a reset is detected. Once a Reset occurs, the
following functions are performed:
Sleep (power down) mode is asserted by executing the “SLEP” instruction. While
entering Sleep mode, WDT (if enabled) is cleared but keeps on running. The controller
can be awakened by:
1) External reset input on /RESET pin,
2) WDT time-out (if enabled)
3) Port 6 input status change (if enabled)
The first two cases will cause the EM78P131A to reset. The T and P flags of R3 are
used to determine the source of the reset (wake-up). The last case is considered the
continuation of program execution and the global interrupt ("ENI" or "DISI" being
executed) determines whether or not the controller branches to the interrupt vector
2
Vdd = 5V, set up time period = 16.8ms ± 30%
Vdd = 3V, set up time period = 18ms ± 30%
The oscillator is running, or will be started.
The Program Counter (R2) is set to all "0."
All I/O port pins are configured as input mode (high-impedance state)
The Watchdog timer and prescaler are cleared.
When power is switched on, the upper 3 bits of R3 are cleared.
The bits of the CONT register are set to all "1" except for Bit 6 (INT flag).
The bits of the IOCB register are set to all "1."
The IOCC register is cleared.
The bits of the IOCD register are set to all "1."
Bit 7 of the IOCE register is set to "1," and Bits 4 and 6 are cleared.
Bits 0 ~ 2 of RF and Bits 0 ~ 2 of IOCF registers are cleared.
8-Bit Microcontroller with OTP ROM
EM78P131A
2
(one
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