em78p131a ELAN Microelectronics Corp, em78p131a Datasheet - Page 35

• Manufacturer Part Number: em78p131a
• Description: 8-bit Microcontroller With Otp Rom
• Manufacturer: ELAN Microelectronics Corp

Product Specification (V1.2) 09.16.2009
(This specification is subject to change without further notice)
5.13 Instruction Set
Each instruction in the instruction set is a 13-bit word divided into an OP code and one
or more operands. Normally, all instructions are executed within on
cycle (one instruction consists of two oscillator period
changed by instruction "MOV R2,A", "ADD R2,A", or by instructions of arithmetic or
logic operation on R2 (e.g., "SUB R2,A", "BS(C) R2,6", "CLR R2", etc.). In this case,
the execution takes two instruction cycles.
If for some reasons, the specification of the instruction cycle is not suitable for c
applications, tr
A) Modify one instruction cycle to consist of four oscillator periods.
B) "JMP," "CALL," "RET," "RETL," "RETI," or the conditional skip ("JBS," "JBC," "JZ,"
Case (A) is selected by the Code Option bit, called CLK. One instruction cycle consists
of two oscillator clocks if CLK is low; and four oscillator clocks if CLK is high.
Note that once the four oscillator periods within one instruction cycle is selected as in
Case (A), the internal clock source to TCC should be CLK=Fosc/4, instead of Fosc/2.
Moreover, the instruction set has the following features:
1) Every bit of any register can be set, cle
2) The I/O register
The following symbols are used in the Instruction Set table:
Convention:
R = Register designator that specifies which one of the registers (including operation and general purpose
b = Bit field designator that selects the value for the bit located in the register R and which affects the
k = 8 or 10-bit constant or literal value
Binary Instruction
0 0000 0000 0000
0 0000 0000 0001
0 0000 0000 0010
0 0000 0000 0011
0 0000 0000 0100
0 0000 0000 rrrr
can operate on I/O register.
operation.
"JZA," "DJZ,” "DJZA") commands which were tested to be true, are executed within
two instruction cycles. The instructions that are written to the program counter also
take two instruction cycles.
registers) is to be utilized by the instruction.
Bits 6 and 7 in R4 determine the selected register bank.
y modifying the instruction as follows:
can be regarded as general register. That is, th
0000
0001
0002
0003
0004
000r
Hex
Mnemonic
CONTW
WDTC
IOW R
SLEP
NOP
DAA
ared, o
No Operation
Decimal Adjust A
A → CONT
0 → WDT, Stop oscillator
0 → WDT
A → IOCR
8-Bit Microcontroller with OTP ROM
r tested directly.
Operation
s), unless the program counter is
e single instruction
e same instruction
Status Affected
EM78P131A
None
None
None
T, P
T, P
C
ertain
1
• 31